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Configuration Handbook - Kamami.pl

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Programming & <strong>Configuration</strong> File SupportAt 3.3-V operation, all EPC2 inputs are 5.0-V tolerant, except DATA, DCLK,and nCASC. The DATA and DCLK pins are used only to interface betweenthe EPC2 device and the FPGA it is configuring. The voltage tolerances ofall EPC2 pins at 5.0 V and 3.3 V are listed in Table 5–4.Table 5–4. EPC2 Input & Bidirectional Pin Voltage TolerancePin5.0-V Operation5.0-V Tolerant 3.3-V Tolerant3.3-V Operation5.0-VTolerant3.3-VTolerantDATA v v vDCLK v v vnCASC v v vOE v v v vnCS v v v vVCCSEL v v v vVPPSEL v v v vnINIT_CONF v v v vTDI v v v vTMS v v v vTCK v v v vIf an EPC2, EPC1 or EPC1441 configuration device is powered at 3.3 V, thenSTATUS and CONF_DONE pull-up resistors must be connected to3.3 V. If these configuration devices are powered at 5.0 V, the nSTATUSand CONF_DONE pull-up resistors can be connected to 3.3 V or 5.0 V.Programming &<strong>Configuration</strong>File SupportThe Quartus II and MAX+PLUS II development systems provideprogramming support for Altera configuration devices. Duringcompilation, the Quartus II and MAX+PLUS II software automaticallygenerates a POF, which can be used to program the configurationdevice(s). In a multi-device project, the software can combine theprogramming files for multi<strong>pl</strong>e Stratix series, Cyclone series, APEX II,APEX 20K, Mercury, ACEX 1K, and FLEX 10K devices into one or moreconfiguration devices. The software allows you to select the appropriateconfiguration device to most efficiently store the data for each FPGA.5–14 Altera Corporation<strong>Configuration</strong> <strong>Handbook</strong>, Volume 2 April 2007

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