Configuration Handbook - Kamami.pl

Device ConfigurationFigure 5–1 shows the configuration device block diagram.Figure 5–1. Configuration Device Block DiagramFPGA (except FLEX 8000) Configuration Using an EPC2, EPC1, or EPC1441DCLKOscillatorCLKENAnRESETAddressCounternCSOscillatorControlAddressDecodeLogicnCASC (1)(2) OEErrorDetectionCircuitryEPROMArrayDATAShiftRegisterDATAFLEX 8000 Device Configuration Using an EPC1, EPC1441, EPC1213, EPC1064, or EPC1064VDCLKCLKENAnRESETAddressCounternCSOEAddressDecodeLogicnCASC (1)EPROMArrayDATAShiftRegisterDATANotes to Figure 5–1:(1) The EPC1441 devices do not support data cascading. The EPC2, EPC1, and EPC1213 devices support datacascading.(2) The OE pin is a bidirectional open-drain pin.DeviceConfigurationThe EPC2, EPC1, and EPC1441 devices store configuration data in itsEPROM array and serially clock data out using an internal oscillator. TheOE, nCS, and DCLK pins supply the control signals for the address counter5–6 Altera CorporationConfiguration Handbook, Volume 2 April 2007