Configuration Handbook - Kamami.pl

Fast Passive Parallel Configurationconfiguration. All other configuration pins (nCONFIG, nSTATUS, DCLK,DATA[7..0], and CONF_DONE) are connected to every device in thechain. You should pay special attention to the configuration signalsbecause they may require buffering to ensure signal integrity and preventclock skew problems. Specifically, ensure that the DCLK and DATA linesare buffered for every fourth device.When configuring multiple devices, configuration does not begin until alldevices release their OE or nSTATUS pins. Similarly, since all deviceCONF_DONE pins are tied together, all devices initialize and enter usermode at the same time.Since all nSTATUS and CONF_DONE pins are tied together, if any devicedetects an error, configuration stops for the entire chain and the entirechain must be reconfigured. For example, if the first FPGA flags an erroron nSTATUS, it resets the chain by pulling its nSTATUS pin low. This lowsignal drives the OE pin low on the enhanced configuration device anddrives nSTATUS low on all FPGAs, which causes them to enter a resetstate. This behavior is similar to a single FPGA detecting an error.If the Auto-Restart Configuration After Error option is turned on, thedevices will automatically initiate reconfiguration if an error occurs. TheFPGAs will release their nSTATUS pins after a reset time-out period(maximum of 40 µs). When all the nSTATUS pins are released and pulledhigh, the configuration device tries to reconfigure the chain. If theAuto-Restart Configuration After Error option is turned off, the externalsystem must monitor nSTATUS for errors and then pulse nCONFIG lowfor at least 8 µs to restart configuration. The external system can pulsenCONFIG if nCONFIG is under system control rather than tied to V CC .In your system, you may have multiple devices that contain the sameconfiguration data. To support this configuration scheme, all device nCEinputs are tied to GND, while nCEO pins are left floating. All otherconfiguration pins (nCONFIG, nSTATUS, DCLK, DATA[7..0], andCONF_DONE) are connected to every device in the chain. You should payspecial attention to the configuration signals because they may requirebuffering to ensure signal integrity and prevent clock skew problems.Specifically, ensure that the DCLK and DATA lines are buffered for everyfourth device. Devices must be the same density and package. All deviceswill start and complete configuration at the same time. Figure 6–18 showsmulti-device FPP configuration when both APEX II devices are receivingthe same configuration data.6–36 Altera CorporationConfiguration Handbook, Volume 1 August 2005