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ARM Cortex-A15 MPCore Processor Technical Reference Manual

ARM Cortex-A15 MPCore Processor Technical Reference Manual

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System Control31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Table 4-53 shows the ACTLR bit assignments.Bits Name FunctionEnable invalidatesof BTBDisable loop bufferLimit to one loop bufferDisable micro-BTBDisable indirect predictorExecute PLD instructions as a NOPSMPExecute WFE instruction as a NOPExecute WFI instruction as a NOPDisable flag renaming optimizationForce serialization after each groupLimit to one instruction per instruction groupForce push of CP14/CP15 registersFlush after CP14/CP15 writesForce limit of one group commit/deallocate per cycleForce in-order issue in branch execution unitEnable full Strongly Ordered and Device load replayDisable L2 TLB performance optimizationDisable L2 stage 1 translation table walk L2 PA cacheDisable L2 stage 1 translation table walk cacheDisable L2 translation table walk IPA PA cacheDisable L2 TLB prefetchingForce in-order load issueForce in-order requests to the same set and wayNon-cacheable streaming enhancementWrite streaming no L1-allocate thresholdWrite streaming no-allocate thresholdForce NEON/VFP clock enable activeForce main clock enable activeSnoop-delayed exclusive handlingFigure 4-24 ACTLR bit assignmentsTable 4-53 ACTLR bit assignments[31] Snoop-delayed exclusive handling Snoop-delayed exclusive handling. You must set this bit to 1'b1 in any systemwith three or more processors that can execute exclusive accesses:0 Normal exclusive handling behavior. This is the reset value.1 Modifies exclusive handling behavior by delaying certainsnoop requests.[30] a Force main clock enable active Forces main processor clock enable active:0 Does not prevent the clock generator from stopping theprocessor clock. This is the reset value.1 Prevents the clock generator from stopping the processor clock.[29] a Force NEON/VFP clock enable active Forces NEON and VFP unit clock enable active:0 Does not prevent the clock generator from stopping the NEONand VFP unit clock. This is the reset value.1 Prevents the clock generator from stopping the NEON and VFPunit clock.<strong>ARM</strong> DDI 0438I Copyright © 2011-2013 <strong>ARM</strong>. All rights reserved. 4-58ID062913Non-Confidential

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