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ARM Cortex-A15 MPCore Processor Technical Reference Manual

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DebugTable 10-4 shows the DBGDRCR bit assignments.Table 10-4 DBGDRCR bit assignmentsBits Name Function[31:5] - SBZ.[4] - RAZ/WI.[3] CSPA Clear Sticky Pipeline Advanced. This bit clears the DBGDSCR.PipeAdv bit to 0. The actions onwriting to this bit are:0 No action.1 Clears the DBGDSCR.PipeAdv bit to 0.When the processor is powered down, it is UNPREDICTABLE whether a write of 1 to this bit clearsDBGDSCR.PipeAdv to 0.[2] CSE Clear Sticky Exceptions. This bit clears the DBGDSCR sticky exceptions bits to 0. The actions onwriting to this bit are:0 No action.1 Clears DBGDSCR[8:6] to 0b000.See the <strong>ARM</strong> ® Architecture <strong>Reference</strong> <strong>Manual</strong> <strong>ARM</strong>v7-A and <strong>ARM</strong>v7-R edition for moreinformation on the DBGDSCR.[1] RRQ Restart request. The actions on writing to this bit are:0 No action.1 Request exit from Debug state.Writing 1 to this bit requests that the processor exits Debug state. This request is held until theprocessor exits Debug state. After the request has been made, the debugger can poll theDBGDSCR.RESTARTED bit until it reads as 1.The processor ignores writes to this bit if it is in Non-debug state.[0] HRQ Halt request. The actions on writing to this bit are:0 No action.1 Request entry from Debug state.Writing 1 to this bit requests that the processor enters Debug state. This request is held until theprocessor enters Debug state.After the request has been made, the debugger can poll the DBGDSCR.HALTED bit until it reads1.The processor ignores writes to this bit if it is already in Debug state.10.4.4 Debug External Auxiliary Control RegisterThe DBGEACR characteristics are:PurposeProvides implementation-defined configuration and control options.Usage constraints The DBGEACR is not accessible from the CP14 interface.ConfigurationsAvailable in all configurations.Attributes See the register summary in Table 10-1 on page 10-6.Figure 10-5 on page 10-14 shows the DBGEACR bit assignments.<strong>ARM</strong> DDI 0438I Copyright © 2011-2013 <strong>ARM</strong>. All rights reserved. 10-13ID062913Non-Confidential

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