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ARM Cortex-A15 MPCore Processor Technical Reference Manual

ARM Cortex-A15 MPCore Processor Technical Reference Manual

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Signal DescriptionsTable A-20 Write address channel signals (continued)Signal Type DescriptionAWSIZES[2:0] Input Burst sizeAWUSERS[5:0] Input User signals:• [5:2] Inner attributes:b0000 Strongly-ordered.b0001 Device.b0011 Normal Memory Non-Cacheable.b0110 Write-Through.b0111 Write-Back No Write-Allocate.b1111 Write-Back Write-Allocate.• [1] Inner shareable• [0] Outer shareable.AWVALIDS Input Address validWrite data channel signalsTable A-21 shows the write data channel signals for the ACP.Table A-21 Write data channel signalsSignal Type DescriptionWDATAS[127:0] Input Write dataWLASTS Input Write lastWREADYS Output Write readyWSTRBS[15:0] Input Write strobesWVALIDS Input Write validWrite response channel signalsTable A-22 shows the write response channel signals for the ACP.Table A-22 Write response channel signalsSignal Type DescriptionBIDS[2:0] Output Response IDBREADYS Input Response readyBRESPS[1:0] Output Write responseBVALIDS Output Response valid<strong>ARM</strong> DDI 0438I Copyright © 2011-2013 <strong>ARM</strong>. All rights reserved. A-18ID062913Non-Confidential

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