ARM Cortex-A15 MPCore Processor Technical Reference Manual

Level 1 Memory System6.5.2 Return stack predictionsThe return stack stores the address and the ARM or Thumb state of the instruction after afunction-call type branch instruction. This address is the same as the link register value storedin r14. The following instructions cause a return stack push if predicted:• BL immediate.• BLX(1) immediate.• BLX(2) register.• HBL, ThumbEE state.• HBLP, ThumbEE state.The following instructions cause a return stack pop if predicted:• BX r14.• MOV pc, r14.• LDM r13, {…pc}.• LDR pc, [r13].The LDR instruction can use any of the addressing modes, as long as r13 is the base register.Additionally, in ThumbEE state, you can also use r9 as a stack pointer so the LDR and LDMinstructions with pc as a destination and r9 as a base register are also treated as a return stackpop.Because return-from-exception instructions can change the processor privilege mode andsecurity state, they are not predicted. This includes the LDM(3) instruction, and the MOVS pc, r14instruction.6.5.3 Indirect predictorThe indirect predictor can predict indirect branches that are not return-type instructions. Thispredictor augments the branch address with an additional state that predicts the target addressof an indirect branch. The conditional branch predictor still predicts the direction of conditionalindirect branches. The indirect predictor only provides the address on a predicted takenconditional indirect branch.6.5.4 Static predictorBranches must be resolved one time to be predicted by the dynamic predictor. To accelerate coldstartup of code, the Cortex-A15 MPCore processor includes a static predictor that detectsbranches in the code stream as follows:• Direct unconditional branches, B immediate, are predicted taken.• Direct unconditional call-type branches, BL immediate and BLX immediate, are predictedtaken, and the r14 value is pushed on the return stack.• Direct conditional backwards branches, BCC immediate, are predicted taken.• Unconditional return-type branches, see Return stack predictions, are predicted taken andthe target is popped from the return stack.To avoid potential illegal speculation, the static predictor is disabled when the MMU is disabled.The static predictor does not predict return stack pops with r9 base register in ThumbEE state.6.5.5 Enabling program flow predictionThe program flow prediction is enabled by setting the Z bit in the CP15 System Control Registerto 1. See System Control Register on page 4-54 for more information.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 6-13ID062913Non-Confidential