ARM Cortex-A15 MPCore Processor Technical Reference Manual

NEON and VFP UnitSee the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-R edition for moreinformation on enabling Advanced SIMD and VFP support.Using the Advanced SIMD and VFP in Secure state onlyTo use the Advanced SIMD and VFP in Secure state only, you must first program the CPACRand FPEXC registers. See Coprocessor Access Control Register on page 4-62 andFloating-Point Exception Register on page 14-12.1. Enable access to CP10 and CP11 and clear the ASEDIS bit in the CPACR:MOV r0, 0x00F00000MCR p15, 0, r0, c1, c0, 2ISB2. Set the FPEXC.EN bit to enable Advanced SIMD and VFP:MOV r3, #0x40000000VMSR FPEXC, r3Using the Advanced SIMD and VFP in Secure state and Non-secure state otherthan Hyp modeTo use the Advanced SIMD and VFP in Secure state and Non-secure state other than Hyp mode,you must first define the NSACR, then define the CPACR and FPEXC registers. SeeNon-Secure Access Control Register on page 4-65, Coprocessor Access Control Register onpage 4-62, and Floating-Point Exception Register on page 14-12.1. Enable Non-secure access to CP10 and CP11 and clear the NSASEDIS bit in the NSACR:MRC p15, 0, r0, c1, c1, 2ORR r0, r0, #(3