ARM Cortex-A15 MPCore Processor Technical Reference Manual

Signal DescriptionsWrite response channel signalsTable A-12 shows the write response channel signals for the AXI master interface.Table A-12 Write response channel signalsSignal Type DescriptionBIDM[5:0] Input Response IDBREADYM Output Response readyBRESPM[1:0] Input Write responseBVALIDM Input Response validRead address channel signalsTable A-13 shows the read address channel signals for the AXI master interface.Table A-13 Read address channel signalsSignal Type DescriptionARADDRM[39:0] Output AddressARBARM[1:0] Output Barrier typeARBURSTM[1:0] Output Burst typeARCACHEM[3:0] Output Cache typeARDOMAINM[1:0] Output Domain typeARIDM[5:0] Output Request IDARLENM[7:0] Output Burst lengthARLOCKM Output Lock typeARPROTM[2:0] Output Protection typeARREADYM Input Address readyARSIZEM[2:0] Output Burst sizeARSNOOPM[3:0] Output Snoop request typeARVALIDM Output Address validRead data channel signalsTable A-14 shows the read data channel signals for the AXI master interface.Table A-14 Read data channel signalsSignal Type DescriptionRDATAM[127:0] Input Read dataRIDM[5:0] Input Read IDRLASTM Input Read lastARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. A-15ID062913Non-Confidential