ARM Cortex-A15 MPCore Processor Technical Reference Manual

System Control4.2.26 Virtualization Extensions registersTable 4-26 shows the Virtualization Extensions registers.Name CRn Op1 CRm Op2 Reset Width DescriptionTable 4-26 Virtualization Extensions registersVPIDR c0 4 c0 0 - a 32-bit Virtualization Processor ID Register onpage 4-52lVMPIDR 5 - b 32-bit Virtualization Multiprocessor ID Register onpage 4-53HSCTLR c1 4 c0 0 UNK 32-bit Hyp System Control Register on page 4-67HACTLR 1 UNK 32-bit Hyp Auxiliary Control Register on page 4-69HCR c1 0 0x00000000 32-bit Hyp Configuration Register, see the ARM ®Architecture Reference Manual ARMv7-A andARMv7-R editionHDCR 1 0x00000006 c 32-bit Hyp Debug Configuration Register on page 4-69HCPTR 2 0x000033FF d 32-bit Hyp Coprocessor Trap Register on page 4-71HSTR 3 0x00000000 32-bit Hyp System Trap Register, see the ARM ®Architecture Reference Manual ARMv7-A andARMv7-R editionHACR 7 UNK 32-bit Hyp Auxiliary Control Register on page 4-69HTCR c2 4 c0 2 UNK 32-bit Hyp Translation Control Register on page 4-75VTCR c1 2 UNK 32-bit Virtualization Translation Control Register, seethe ARM ® Architecture Reference ManualARMv7-A and ARMv7-R editionHTTBR - 4 c2 - UNK 64-bit Hyp Translation Table Base Register, see theARM ® Architecture Reference Manual ARMv7-Aand ARMv7-R editionVTTBR - 6 c2 - UNK e 64-bit Virtualization Translation Table Base Register,see the ARM ® Architecture Reference ManualARMv7-A and ARMv7-R editionHADFSR c5 4 c1 0 UNK 32-bit Hyp Auxiliary Data Fault Syndrome Register onpage 4-82HAIFSR 1 UNK 32-bit Hyp Auxiliary Instruction Fault SyndromeRegister on page 4-83HSR c2 0 UNK 32-bit Hyp Syndrome Register on page 4-83HDFAR c6 4 c0 0 UNK 32-bit Hyp Data Fault Address Register, see the ARM ®Architecture Reference Manual ARMv7-A andARMv7-R editionHIFAR 2 UNK 32-bit Hyp Instruction Fault Address Register, see theARM ® Architecture Reference Manual ARMv7-Aand ARMv7-R editionARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 4-23ID062913Non-Confidential