ARM Cortex-A15 MPCore Processor Technical Reference Manual

DebugTable 10-10 shows the DBGWCR bit assignments.Table 10-10 DBGWCR bit assignmentsBits Name Function[31:29] - Reserved.[28:24] MASK Address range mask. The processor supports watchpoint address range masking. This field can seta watchpoint on a range of addresses by masking lower order address bits out of the watchpointcomparison. The value of this field is the number of low order bits of the address that are maskedoff, except that values of 1 and 2 are reserved. Therefore, the meaning of Watchpoint Addressrange mask values are:b00000 No mask.b00001 Reserved.b00010 Reserved.b000110x00000007 mask for data address, three bits masked.b001000x0000000F mask for data address, four bits masked.b001010x0000001F mask for data address, five bits masked....b111110x7FFFFFFF mask for data address, 31 bits masked.[23:21] - Reserved.[20] WT Watchpoint Type. This bit is set to 1 to link the watchpoint to a breakpoint to create a linkedwatchpoint that requires both data address matching and Context matching:0 Unlinked data address match.1 Linked data address match.When this bit is set to 1 the linked breakpoint number field indicates the breakpoint to which thiswatchpoint is linked. See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-Redition for more information.[19:16] LBN Linked Breakpoint Number. If this watchpoint is programmed with the watchpoint type set tolinked, then this field must be programmed with the number of the breakpoint that defines theContext match to be combined with data address comparison. Otherwise, this field must beprogrammed to b0000.Reading this register returns an UNKNOWN value for this field, and the generation of Watchpointdebug events is UNPREDICTABLE, if either:• This watchpoint does not have linking enabled and this field is not programmed to b0000.• This watchpoint has linking enabled and the breakpoint indicated by this field does notsupport Context matching, is not programmed for Context matching, or does not exist.See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-R edition for moreinformation.[15:14] SSC Security State Control. This field enables the watchpoint to be conditional on the security state ofthe processor. This field is used with the Hyp Mode Control (HMC) and Privileged Access Control(PAC) fields.See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-R edition for possible valuesof the fields, and the access modes and security states that can be tested.[13] HMC Hyp Mode Control. This field is used with the Security State Control (SSC) and PAC fields. Thevalue of DBGWCR.PAC has no effect for accesses made in Hyp mode.See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-R edition for possible valuesof the fields, and the access modes and security states that can be tested.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 10-19ID062913Non-Confidential