ARM Cortex-A15 MPCore Processor Technical Reference Manual

Program Trace Macrocellarchitecture, and because register assignments are consistent across the trace architectures theregister short names always take the ETM prefix. Table 12-2 gives some examples of theregister short names.Table 12-2 Examples of register short namesPTM register name Register short name Explanation of short nameMain Control Register ETMCR Trace Control RegisterTrigger Event Register ETMTRIGGER Trace Trigger RegisterAddress Comparator Value Register 3 ETMACVR3 Trace Address Comparator Value Register 3The use of the ETM prefix for the register short names means that the short names are distinctfrom the short names used for other registers, such as the processor control coprocessor registersand the debug registers.12.5.3 Event definitionsAs described in the CoreSight Program Trace Flow Architecture Specification, there are severalevent registers that you can program to select specific inputs as control events. Table 12-3 showsthe event resources defined for the PTM.Resource type Index values DescriptionTable 12-3 Event resource definitionsb000 0-7 Single address comparator 1-8b001 0-3 Address range comparator 1-4b100 0-1 Counter 1-2 at zerob101 0-2 Sequencer in states 1-38 Context ID comparator11 VMID comparator15 Trace start/stop resourceb110 0-3 External inputs 1-48-9 Extended external input selectors 1-213 Processor is in Non-secure state14 Trace prohibited by processor15 Hard-wired resource (always true)12.5.4 Turning off the PTMDuring normal operation, the PTM buffers individual bytes of trace, and only generates outputwhen at least 4 bytes are available. To enable the clocks to be gated, the PTM provides amechanism to flush all trace out of the FIFOs in certain conditions. This differs from theAFVALID mechanism, which only ensures that trace up to a certain point has been output.When the PTM requires to enter an idle state, all trace in the FIFO is output. After the final dataon the ATB interface has been accepted, the PTM is in an idle state.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 12-9ID062913Non-Confidential