ARM Cortex-A15 MPCore Processor Technical Reference Manual

NEON and VFP Unit14.1 About NEON and VFP unitNEON technology is the implementation of the Advanced Single Instruction Multiple Data(SIMD) extension to the ARMv7-A architecture. It provides support for integer andfloating-point vector operations. This technology extends the processor functionality to providesupport for the ARMv7 Advanced SIMDv2 instruction set.VFP is the vector floating-point coprocessor extension to the ARMv7-A architecture. Itprovides low-cost high performance floating-point computation. VFP extends the processorfunctionality to provide support for the ARMv7 VFPv4 instruction set.You can configure the Cortex-A15 MPCore processor to include different combinations ofsupport for Advanced SIMD and VFP extensions. Table 14-1 shows the possible combinations.Table 14-1 Combinations of Advanced SIMD and VFP extensionsAdvanced SIMDv2SupportedNot supportedNot supportedVFPv4SupportedSupportedNot supportedThis section describes the following:• Advanced SIMDv2 support.• VFPv4 support.14.1.1 Advanced SIMDv2 supportThe processor supports all addressing modes, data types, and operations in the AdvancedSIMDv2 extension. See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-Redition for information on the Advanced SIMDv2 instruction set.14.1.2 VFPv4 supportThe processor supports all addressing modes, data types, and operations in the VFPv4 extensionwith version 3 of the Common VFP subarchitecture. The processor implements VFPv4-D32.See the ARM ® Architecture Reference Manual ARMv7-A and ARMv7-R edition for informationon the VFPv4 instruction set.In the Cortex-A15 VFP implementation:• All scalar operations are implemented entirely in hardware, with support for allcombinations of rounding modes, flush-to-zero, and default NaN modes.• Vector operations are not supported. Any attempt to execute a vector operation results inan Undefined Instruction exception. If an application requires VFP vector operation, thenit must use VFP support code. See the ARM ® Architecture Reference Manual ARMv7-Aand ARMv7-R edition for information on VFP vector operation support.• The Cortex-A15 VFP implementation does not generate asynchronous VFP exceptions.NoteAn attempt to execute a vector operation that results in an Undefined Instruction exception doesnot set the FPEXC.DEX bit.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 14-2ID062913Non-Confidential