ARM Cortex-A15 MPCore Processor Technical Reference Manual

Program Trace MacrocellTable 12-6 ETMCCR bit assignments (continued)Bits Name Function[16] Sequencer present Sequencer:1 The sequencer is present.[15:13] Number of counters Specifies the number of counters. For the Cortex-A15 MPCore processor, thisvalue is 2.[12:4] - SBZP.[3:0] Number of address comparator pairs Specifies the number of address comparator pairs. For the Cortex-A15 MPCoreprocessor, this value is 4.12.7.3 System Configuration RegisterThe ETMSCR characteristics are:PurposeShows the PTM features supported by the PTM macrocell. The contentsof this register are based on inputs provided by the ASIC.Usage constraints There are no usage constraints.ConfigurationsAvailable in all PTM configurations.Attributes See the register summary in Table 12-4 on page 12-11.Figure 12-4 shows the ETMSCR bit assignments.31 15 14 12 11 9 8 7 0ReservedReservedNumber of processors supported by PTMReservedFIFOFULL supportedFigure 12-4 ETMSCR bit assignmentsTable 12-7 shows the ETMSCR bit assignments.Table 12-7 ETMSCR bit assignmentsBits Name Function[31:15] - SBZP.[14:12] Number of processors supported by PTM Indicates the number of processor supported minus one. For the Cortex-A15MPCore processor, this value is 0.[11:9] - SBZP.[8] FIFOFULL supported Indicates that FIFOFULL is not supported. For the Cortex-A15 MPCoreprocessor, this value is 0.[7:0] - SBZP.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 12-17ID062913Non-Confidential