ARM Cortex-A15 MPCore Processor Technical Reference Manual

Level 1 Memory System6.5 Program flow predictionThe Cortex-A15 MPCore processor contains program flow prediction hardware, also known asbranch prediction. With program flow prediction disabled, all taken branches incur a penaltyassociated with flushing the pipeline. To avoid this penalty, the branch prediction hardwareoperates at the front of the instruction pipeline. The branch prediction hardware consists of:• A Branch Target Buffer (BTB) to identify branches and provide targets for directbranches.• 2-level global history-based direction predictor.• Indirect predictor to provide targets for indirect branches.• Return stack.• Static predictor.The combination of global history-based direction predictor and BTB are called dynamicpredictor.This section describes program flow prediction in:• Predicted and non-predicted instructions.• Return stack predictions on page 6-13.• Indirect predictor on page 6-13.• Static predictor on page 6-13.• Enabling program flow prediction on page 6-13.6.5.1 Predicted and non-predicted instructionsThis section describes the instructions that the processor predicts. Unless otherwise specified,the list applies to ARM, Thumb, and ThumbEE instructions. As a general rule, the branchprediction hardware predicts all branch instructions regardless of the addressing mode,including:• Conditional branches.• Unconditional branches.• Indirect branches.• Branches that switch between ARM and Thumb states.• PC destination data processing operations.• Handler branches, HB and HBL, in ThumbEE state.• BXJ, because of the inclusion of the trivial Jazelle Extension, this degenerates to a BXinstruction.However, the following branch instructions are not predicted:• Instructions with the S suffix are not predicted because they are typically used to returnfrom exceptions and have side effects that can change privilege mode and security state.• All mode changing instructions.In Thumb state, you can make a branch that is normally encoded as unconditional conditionalby including an If-Then (IT) block. It is then treated as a normal conditional branch.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 6-12ID062913Non-Confidential