ARM Cortex-A15 MPCore Processor Technical Reference Manual

Program Trace MacrocellProgramming registersYou program and read the PTM registers using the Debug APB interface. A reset of the PTMinitializes the following registers:• Main Control Register on page 12-14.• Synchronization Frequency Register on page 12-19.• CoreSight Trace ID Register, see the CoreSight Program Flow Trace ArchitectureSpecification.• The CoreSight registers at offsets 0xF00 to 0xFFC.• Peripheral Identification Registers on page 12-30.• Component Identification Registers on page 12-30.To start tracing, you must program the following registers to avoid UNPREDICTABLE behavior:• Main Control Register on page 12-14.• Trigger Event Register, TTER, see the CoreSight Program Flow Trace ArchitectureSpecification.• TraceEnable Start/Stop Control Register on page 12-18.• TraceEnable Control Register 1 on page 12-18.• TraceEnable Event Register, see the CoreSight Program Flow Trace ArchitectureSpecification.• CoreSight Trace ID Register, see the CoreSight Program Flow Trace ArchitectureSpecification.You might also require to program the following:• Address Comparator Registers if the respective address comparators are used.• Counter Registers if the respective counters are used.• Sequencer Registers if the sequencer is used.• External Output Event Registers if the external outputs are used.• Context ID Comparator Registers if the context ID comparator is used.• VMID Comparator Register if the VMID comparator is used.• Timestamp Event Register is timestamping is used.• Extended External Input Selection Register on page 12-22 if the extended external inputsare used.12.5.2 Register short namesAll of the PTM registers have short names. Most of these are mnemonics for the full name ofthe register, except that the short name starts with the letters ETM, indicating that the register isdefined by an ARM trace architecture. The ETM architecture is the original ARM traceARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 12-8ID062913Non-Confidential