ARM Cortex-A15 MPCore Processor Technical Reference Manual

Functional DescriptionTo power down the processor and the NEON and VFP power domains, apply the followingsequence:1. Clear the SCTLR.C bit, or HSCTLR.C bit if in Hyp mode, to prevent additional datacache allocation.2. Clean and invalidate all data from the L1 data cache. The L2 duplicate snoop tag RAMfor this processor is now empty. This prevents any new data cache snoops or data cachemaintenance operations from other processors in the multiprocessor being issued to thisprocessor.3. Switch the processor from Symmetric Multiprocessing (SMP) mode to AsymmetricMultiprocessing (AMP) mode by clearing the ACTLR SMP bit. Clearing the SMP bitenables the processor to be taken out of coherency by preventing the processor fromreceiving cache, TLB, or BTB maintenance operations broadcast by other processors inthe multiprocessor.4. Ensure that the system does not send interrupts to the processor that is being powereddown.5. Execute an ISB instruction to ensure that all of the CP15 register changes from theprevious steps have been committed.6. Execute a DSB instruction to ensure that all cache, TLB and branch predictor maintenanceoperations issued by any processor in the multiprocessor before the SMP bit was clearedhave completed.7. Execute a WFI instruction and wait until the STANDBYWFI output is asserted to indicatethat the processor is in idle and low power state.8. Activate the processor and the NEON and VFP output clamps by asserting thenISOLATECPU and nISOLATECX inputs LOW.9. Remove power from the processor and the NEON and VFP power domains.To power up the processor and the NEON and VFP power domains, apply the followingsequence:1. Assert nCPUPORESET.2. Apply power to the processor and the NEON and VFP power domains while keepingnCPUPORESET asserted.3. When power is restored, continue to hold nCPUPORESET for 16 CLK cycles to allowthe reset to propagate.4. Release the processor and the NEON and VFP output clamps by deassertingnISOLATECPU and nISOLATECX.5. Continue a normal powerup reset sequence.To power up the processor while keeping the NEON and VFP unit powered down, apply thefollowing sequence:1. Assert nCPUPORESET.2. Apply power to the processor power domain while keeping nCPUPORESET asserted.Be sure to keep the NEON and VFP domain powered down.3. When power is restored, continue to hold nCPUPORESET for 16 CLK cycles to allowthe reset to propagate.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 2-31ID062913Non-Confidential