ARM Cortex-A15 MPCore Processor Technical Reference Manual

Signal DescriptionsA.11 PTM interfaceThis section describes the PTM interface in:• ATB interface.• Miscellaneous PTM interface.A.11.1ATB interfaceTable A-28 shows the signals of the ATB interface. In this table, the value x represents processor0, 1, 2, or 3 in your design.Table A-28 ATB interface signalsSignal Type DescriptionAFREADYMx Output FIFO flush acknowledge:0 FIFO flush not complete.1 FIFO flush complete.AFVALIDMx Input FIFO flush request.ATBYTESMx[1:0] Output CoreSight ATB device data size:b001 byte.b012 byte.b103 byte.b114 byte.ATDATAMx[31:0] Output ATB data bus.ATIDMx[6:0] Output ATB trace source identification.ATREADYMx Input ATB device ready:0 Not ready.1 Ready.ATVALIDMx Output ATB valid data:0 No valid data.1 Valid data.ATCLKEN Input ATB clock enable.SYNCREQx Input Synchronization request. The input must be driven HIGH for one ATCLK cycle.A.11.2Miscellaneous PTM interfaceTable A-29 shows the miscellaneous Program Trace Macrocell signals.Table A-29 Miscellaneous PTM interface signalsSignal Type DescriptionTSCLKCHANGE Input CLK frequency change indicator. The input must be driven HIGH for a single CLK cycle if thefrequency of CLK is changed. If not used, this input must be tied LOW.TSVALUEB[63:0] Input Global system timestamp value in binary format.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. A-23ID062913Non-Confidential