ARM Cortex-A15 MPCore Processor Technical Reference Manual

DebugTable 10-8 DBGBCR bit assignments (continued)Bits Name Function[12:9] - Reserved.[8:5] BAS Byte Address Select. This field enables match or mismatch comparisons on only certain bytes ofthe word address held in the DBGBVR. The operation of this field depends also on:• The Breakpoint Type field being programmed for instruction address match or mismatch.• The MASK field being programmed to b00000, no mask.• The instruction set state of the processor, indicated by the CPSR.J and CPSR.T bits.This field must be programmed to b1111 if either:• DBGBCR.BT is programmed for Linked or Unlinked Context ID match• DBGBCR.MASK is programmed to a value other than b00000.If this is not done, the generation of debug events by this breakpoint is UNPREDICTABLE.[4:3] - Reserved.[2:1] PMC Privileged Mode Control. This field enables breakpoint matching conditional on the mode of theprocessor.This field is used with the SSC and HMC fields. See the ARM ® Architecture Reference ManualARMv7-A and ARMv7-R edition for possible values of the fields, and the mode and security statesthat can be tested.This field must be programmed to b11 if DBGBCR.BT is programmed for Linked Context IDmatch. If this is not done, the generation of debug events by this breakpoint is UNPREDICTABLE.[0] E Breakpoint enable. This bit enables the breakpoint:0 Breakpoint disabled.1 Breakpoint enabled.A breakpoint never generates debug events when it is disabled.10.4.7 Watchpoint Value RegistersThe DBGWVR characteristics are:PurposeHolds a data address value for use in watchpoint matching. The addressused must be the virtual address of the data.Usage constraints Used in conjunction with a DBGWCR to form a watchpoint. SeeWatchpoint Control Registers on page 10-18. Each DBGWVR isassociated with a DBGWCR to form a Watchpoint Register Pair (WRP).DBGWVRn is associated with DBGWCRn to form watchpoint n.ConfigurationsAttributesThe processor implements 4 WRPs, and is specified by theDBGDIDR.WRPs field, see Debug ID Register on page 10-10.See the register summary in Table 10-1 on page 10-6. The debug logicreset value of a DBGWVR is UNKNOWN.Figure 10-8 shows the DBGWVR bit assignments.31 2 1 0Data address[31:2]ReservedFigure 10-8 DBGWVR bit assignmentsARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 10-17ID062913Non-Confidential