ARM Cortex-A15 MPCore Processor Technical Reference Manual

Level 2 Memory System7.7 AXI Coherency ExtensionsAXI Coherency Extensions (ACE) is an extension to the AXI protocol and provides thefollowing enhancements:• Third-level caches.• On-chip RAM.• Peripherals.• External memory.The width of the AXI read and write channels can be configured for a 64-bit or 128-bit interface.ACE supports 1:1 clock ratios with respect to the processor clock. It can also run at any integermultiple of the processor clock N:1.Note• The Cortex-A15 MPCore processor does not support a 64-bit ACE with a 128-bit ACP.• No read or write request from a Cortex-A15 MPCore ACE master port can cross a 64-bytealigned boundary. The request, including non-cacheable, is always broken up.This section describes ACE in:• ACE L2 memory interface attributes.• ARID and AWID.• ACE transfers on page 7-13.• Distributed virtual memory transactions on page 7-14.• Cache maintenance transactions on page 7-14.• Snoop filter support on page 7-15.• ACE configurations on page 7-15.• Configuration signals on page 7-16.7.7.1 ACE L2 memory interface attributesAttribute Value DescriptionTable 7-4 shows the ACE L2 memory interface attributes for the Cortex-A15 MPCoreprocessor. The table lists the maximum possible values for the read and write issuingcapabilities.Table 7-4 ACE L2 memory interface attributesWrite issuing capability 16 16 outstanding writes supported that can be evictions, single writes, or write bursts of anymemory type.Read issuing capability 11 11 outstanding reads supported that can be linefills, single reads, or read bursts of anymemory type.Combined issuing capability 27 -Snoop acceptance capability 20 12 requests buffered and 8 requests actively being processed.7.7.2 ARID and AWIDWhen the system issues multiple requests on the AR channel with the same ARID, or on theAW channel with the same AWID, it must follow the appropriate ordering rules as described inthe ARM ® AMBA ® AXI and ACE Protocol Specification AXI3 , AXI4 , and AXI4-Lite , ACEand ACE-Lite .ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 7-12ID062913Non-Confidential