ARM Cortex-A15 MPCore Processor Technical Reference Manual

NEON and VFP UnitConfigurationsAvailable if VFP is implemented. The FPSID register is a Configurableaccess register which is a system control register that secure software canconfigure the access to. When the settings in the CPACR, see CoprocessorAccess Control Register on page 4-62, permit access to the FPSIDregister:• It is accessible in Non-secure state only if the NSACR.{CP11,CP10} bits are both set to 1. See Non-Secure Access ControlRegister on page 4-65.• Bits in the HCPTR, see Hyp Coprocessor Trap Register onpage 4-71, also control Non-secure access to the register.Attributes See the register summary in Table 14-3 on page 14-6.Figure 14-1 shows the FPSID bit assignments.31 24 23 22 16 15 8 7 4 3 0ImplementerSubarchitecture Part number Variant RevisionSWFigure 14-1 FPSID bit assignmentsTable 14-4 shows the FPSID bit assignments.Table 14-4 FPSID bit assignmentsBits Name Function[31:24] Implementer Indicates the implementer:0x41 ARM Limited.[23] SW Software bit. This bit indicates that a system provides only software emulation of the VFPfloating-point instructions:0x0 The system includes hardware support for VFP floating-point operations.[22:16] Subarchitecture Subarchitecture version number:0x04 VFP architecture v4 with Common VFP subarchitecture v3. The VFP architectureversion is indicated by the MVFR0 and MVFR1 registers.[15:8] Part number Indicates the part number for the floating-point implementation:0x30 VFP.[7:4] Variant Indicates the variant number:0xF Cortex-A15.[3:0] Revision Indicates the revision number for the floating-point implementation:0x0 Revision 0.Floating-Point Status and Control RegisterThe FPSCR characteristics are:PurposeProvides status information and control of unprivileged execution for thefloating-point system.Usage constraints There are no usage constraints.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 14-7ID062913Non-Confidential