ARM Cortex-A15 MPCore Processor Technical Reference Manual

Program Trace MacrocellTable 12-13 ETMAUXCR bit assignments (continued)Bits Name Function[2] Disable timestamps on exceptionentry or returnSpecifies whether the PTM issues a timestamp on an exception entry or return:0 PTM issues timestamps on exception entry or return. This is thereset value.1 PTM does not issue timestamps on exception entry or return.[1] Disable timestamps on barriers Specifies whether the PTM issues a timestamp on a barrier instruction:0 PTM issues timestamps on barrier instructions. This is the resetvalue.1 PTM does not issue timestamps on barriers.[0] Disable forced overflow Specifies whether the PTM enters overflow state when synchronization isrequested, and the previous synchronization sequence has not yet completed. Thisdoes not affect entry to overflow state when the FIFO becomes full:0 Forced overflow enabled. This is the reset value.1 Forced overflow disabled.When setting any of bits[3:0] of this register the PTM behavior might contradict the CoreSightProgram Flow Trace Architecture Specification. Tools must be aware of the implications ofsetting any of these bits:• Bit[0] might be set if the FIFO overflows because of the forced overflow condition. Seethe CoreSight Program Flow Trace Architecture Specification for information on thiscondition. If this bit is set, tools must be aware that synchronization might not occurwithin the desired synchronization period.• Bit[1] might be set if timestamp packets are not required on barrier instructions. Typically,this might be set when using timestamping as a low-bandwidth measure of time, but mightmake correlation of multiple trace sources impossible.• Bit[2] might be set if timestamp packets are not required on exception entry or return.Typically, this might be set when using timestamping as a low-bandwidth measure oftime, but might make correlation of multiple trace sources impossible.• Bit[3] might be set if tools do not require the waypoint update packet that is output if thereare more than 4096 bytes between waypoints.12.7.11 Power Down Control RegisterThe ETMPDCR characteristics are:PurposeControls powerdown of the PTM.Usage constraints There are no usage constraints.ConfigurationsAvailable in all PTM configurations that have full support for trace overpowerdown.Attributes See the register summary in Table 12-4 on page 12-11.Figure 12-11 on page 12-25 shows the ETMPDCR bit assignments.ARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 12-24ID062913Non-Confidential