ARM Cortex-A15 MPCore Processor Technical Reference Manual

System ControlTable 4-73 shows the RAMINDEX bit assignments.Table 4-73 RAMINDEX bit assignmentsBits Name Function[31:24] RAMID RAM Identifier. This field indicates which RAM is being accessed:0x00 L1-I tag RAM.0x01 L1-I data RAM.0x02 L1-I BTB RAM.0x03 L1-I GHB RAM.0x04 L1-I TLB array.0x05 L1-I indirect predictor RAM.0x08 L1-D tag RAM.0x09 L1-D data RAM.0x0A L1-D load-TLB array.0x0B L1-D store-TLB array.0x10 L2 tag RAM.0x11 L2 data RAM.0x12 L2 snoop tag RAM.0x13 L2 data ECC RAM.0x14 L2 dirty RAM.0x18 L2 TLB RAM.[23:22] - Reserved, RAZ/WI.[21:18] Way Indicates the way of the RAM that is being accessed.[17:0] Index Indicates the index address of the RAM that is being accessed.Note• In Non-secure PL1 and PL2 modes, the RAMINDEX operation returns the contents of theRAM only if the entry is marked valid and Non-secure. Entries that are marked invalid orSecure update the IL1Datan or DL1Datan registers with 0x0 values.• In Secure PL1 modes, the RAMINDEX operation returns the contents of the RAM,regardless of whether the entry is marked valid or invalid, and Secure or Non-secure.Note• The L1-I, L1-D, L2 TLB, and L2 snoop tag RAMs can only be accessed by the processorwhere the RAM resides or that owns the RAM.• The L2 tag, data, data ECC, and dirty RAMs can be accessed by any processor.Figure 4-43 shows the RAMINDEX bit assignments for accessing L1-I tag RAM.31 24 23 19 18 17 14 136 50RAMID = 0x00ReservedReservedVirtual address [13:6]ReservedWayFigure 4-43 RAMINDEX bit assignments for L1-I tag RAMARM DDI 0438I Copyright © 2011-2013 ARM. All rights reserved. 4-92ID062913Non-Confidential