R&S FSQ Signal Analyzer - Rohde & Schwarz

R&S FSQ Remote Control – Basics
5.7.3.11 STATus:QUEStionable:POWer Register
Status Reporting System
This register comprises all information about possible overloads of the unit.
It can be queried with commands STATus:QUEStionable:POWer:CONDition?
and STATus:QUEStionable:POWer[:EVENt]?.
Bit
No.
Meaning
0 OVERload (Screen A)
This bit is set if the RF input is overloaded. 'OVLD' will then be displayed.
1 UNDerload (Screen A)
This bit is set if the RF input is underloaded. 'UNLD' will then be displayed.
2 IF_OVerload (Screen A)
This bit is set if the IF path is overloaded. 'IFOVL' will then be displayed.
3 Overload Trace (Screen A)
This bit is set if the input is overloaded (OVLD or IFOVL) and the Trace Modes AVERAGE ,
MAXHOLD or MINHOLD are active.
'OVTRC' will then be displayed.
This bit only clears if the sweep is started again. A temporary overload will therefore be
detected, e.g. if the overload condition occurs only on sweep number 10 of 1000 during the
average process.
4 to 7 not used
8 OVERload (Screen B)
This bit is set if the RF input is overloaded. 'OVLD' will then be displayed.
9 UNDerload (Screen B)
This bit is set if the RF input is underloaded. 'UNLD' will then be displayed.
10 IF_OVerload (Screen B)
This bit is set if the IF path is overloaded. 'IFOVL' will then be displayed.
11 Overload Trace (Screen B)
This bit is set if the input is overloaded (OVLD or IFOVL) and the Trace Modes AVERAGE ,
MAXHOLD or MINHOLD are active.
'OVTRC' will then be displayed.
This bit only clears if the sweep is started again.
12 to
14
not used
15 This bit is always 0.
Operating Manual 1313.9681.12 - 01 5.31