U. Glaeser

Merits of the SOI structure
Merits of the fully depleted transistor
FIGURE 2.78 Features of a fully depleted SOI transistor.
FIGURE 2.79 Small junction capacitance.
in lower junction capacitance due to the SOI structure is a remarkable advantage considering the trend
of reducing the LSI supply voltage in order to reduce power consumption.
In SOI structures, there is no MOS reverse body effect, because the body is electrically floating due to
the presence of the buried oxide layer, as shown in Fig. 2.80. In MOSFETs on a bulk Si substrate, the
body, which is to say the p-well, is connected to ground, so when the circuit is operating, the body
potential, V BS, is always negative. Thus, if threshold voltage of MOSFETs (V th) rises, the drain current
decreases. When the supply voltage is 1 V or more in n-MOSFETs on an SOI substrate, holes generated
in the high electric field drain region accumulate in the body region and create a positive body bias. Thus
the V BS becomes positive, V th is reduced, and the drain current increases. This feature results in better
performance than is obtained with MOSFETs on bulk Si substrate in the case of logic gates that consist
of stacked MOSFETs and pass transistor logic gates.
For the development of multifunction LSI chips, the implementation of a mixed analog/digital (mixedsignal
LSI) chip, which is a single chip on which reside RF circuits and analog-digital conversion circuits
rather than just a digital signal processing block, is desired as a step toward realizing the system-on-a-chip.
© 2002 by CRC Press LLC
Low capacitance near source/drain
High-speed operation at low voltages
No substrate bias effect
High speed
Low crosstalk
Analog-digital mixed-signal circuits
Steep subthreshold characteristic
High-speed operation at low voltages
Small body potential floating effect
Stable operation
Drain current
NMOS PMOS
N+ N+ P+
Buried oxide layer
SOI substrate
Fully depleted
∆V th
Conventional Bulk Device Ultrathin-Film SOI Device
n +
P-Substrate
Field Oxide
n +
P-Substrate
Partially depleted
Gate voltage
Field Oxide
Buried Oxide
Depletion Layer
P+