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U. Glaeser

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FIGURE 2.92 Steep subthreshold slope in FD device.<br />

FIGURE 2.93 No need for body contacts in FD device.<br />

depletion layer capacitance in the bulk Si device, C dep, is a series connection of the body depletion layer<br />

capacitance, C Si, and the buried oxide layer capacitance, C BOX, and the controllability of the gate voltage<br />

with respect to the channel surface potential is improved.<br />

Furthermore, from the viewpoint of circuit design, the superiority of the FD-SOI device relative to<br />

the PD-SOI device is that the kink phenomenon does not appear in the drain voltage current characteristic<br />

(Fig. 2.89), and, further, that dynamic instabilities such as changes in V th caused by the floating body<br />

effect during circuit operation are small [23]. As a result, there is an advantage in terms of the layout<br />

area, because there is no need for body contacts including for analog circuits, and it is also possible for<br />

the layoutss and other such design assets that have been used for bulk Si to be used as they are (Fig. 2.93).<br />

An example of a prototype FD-SOI device LSI that takes advantage of the features described above that<br />

was newly announced at the ISSCC is shown in Table 2.6.<br />

Low-Power, Mixed-Signal LSI Application<br />

Further advancement of portable systems in the form of wearable information equipment with a wireless<br />

interface will enable us to enjoy various multimedia applications anywhere and anytime. The realization<br />

of wearable communication devices requires lower power consumption, ultra-compactness, reduced<br />

© 2002 by CRC Press LLC<br />

SiO 2<br />

n + p<br />

Si Substrate<br />

S = (kT/q) ln (10)<br />

(1 + C dep /C ox )<br />

~ (kT/q) In(10)<br />

~ 60 mV/dec<br />

n +<br />

C Si<br />

n +<br />

C BOX<br />

Cdep 1/CSi + 1/CBOX in SOI<br />

Cdep /Cox

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