U. Glaeser

Other application areas that one may find configurable computing systems applied to are: cryptography,
fingerprint matching, multimedia, and astronomy.
More in-depth information on virtual computing power and a list of applications of configurable
computing system is
13. J. Vuillemin, P. Bertin, D. Roncin, M. Shand, H. Touati, and P. Boucard, Programmable active
memories: reconfigurable systems come of age, IEEE Trans. on VLSI Systems, vol. 4, no. 1, pp. 56–69,
March 1996.
More information on research and development into design tools for configurable computing may be
obtained by visiting the web sites of the research groups involved. Some of these are
14. Brigham Young University, Configurable Computing Web page, http://splish.ee.byu.edu and the
JHDL Web page, http://www.jhdl.org
15. University of Cincinnati, REACT Web page, http://www.ececs.uc.edu/~dal/acs/index.htm
16. Colorado State University, CAMERON Project Web page, http://cs.colostate.edu/cameron
17. Northwestern University, A Matlab Compilation Environment for Adaptive Computing Systems
Web page, http://www.ece.nwu.edu/cpdc/Match/Match.html
18. University of Southern California, DEFACTO Web page, http://www.isi.edu/asd/defacto
19. University of Tennessee, CHAMPION Web page, http://microsys6.engr.utk.edu/~bouldin/darpa
37.3 Xtensa: A Configurable and Extensible Processor
Ricardo E. Gonzalez and Albert Wang
Introduction
Until a few years ago, processors were only sold as packaged individual ICs. However, the growing density
of CMOS circuits created an opportunity for incorporating the processor as part of a larger system on
a chip. Initial processor designs for this market were based on the processor existing as a separate entity,
and cores were handcrafted for each manufacturing process technology, resulting in costly and fixed
solutions. Furthermore, it was not possible to modify these cores for the particular application, in much
the same way that it was not possible to modify a stand-alone prepackaged processor.
Xtensa is a processor core designed with ease of integration, customization, and extension in mind.
Unlike previous processors, Xtensa lets the system designer select and size only the features required for
a given application. The configuration and generation process is straightforward and lets the designer
define new system-specific instructions if preexisting features don’t provide the required functionality.
Furthermore, Xtensa fits easily into the standard ASIC design flow. Xtensa is fully synthesizeable, and
designers can use the most popular physical-design tools during the place-and-route process.
Processor Development
Application-specific processor development is an active area of research in the CAD, computer architecture,
and VLSI design communities. Early attempts to add application-specific instructions to generalpurpose
computer engines relied on writable micro-code [1,2]. These techniques dynamically augmented
the base instruction set with application-specific instructions.
More recent research focuses on automatic instruction set design [3,4] or on reconfigurable, also called
retargetable, processors [5]. These groups, however, try to solve slightly different problems than those
addressed by Xtensa. Automatic instruction set design systematically analyzes a benchmark program to derive
an entirely new instruction set for a given microarchitecture. Our group—here referred to as “we”—focuses
on how to generate a high-performance and low-power implementation of a given microarchitecture with
application-specific extensions. In this respect, automatic instruction set design is a good complement
to our work. Once the instruction set additions are derived automatically by analyzing the benchmark
program, they can be given to the Xtensa processor generator to obtain a high-performance, low-power
© 2002 by CRC Press LLC