U. Glaeser

FIGURE 34.59 Implementation of 1-D 2 Viterbi detector
with two half-rate, 1-D detectors.
FIGURE 34.60 (1,7) coded EPR4 channel.
Node 11
Four paths of length 3 are selected as the surviving most likely paths to the four trellis nodes. The
procedure is repeated and the detected sequence is produced after a delay of 4M = 8 trellis sections. Note,
Fig. 34.58, that the symbol-by-symbol detector error is now corrected. Contrary to this example, a 4-state
PR4ML detector is implemented with two interleaved 2-state dicode, (1 − D), detectors each operating
at one-half the symbol rate of one full-rate PR4 detector [35]. The sequence is interleaved, such that the even
samples go to the first and the odd to the second dicode detector, Fig. 34.59, so the delay D in the
interleaved detectors is actually twice the delay of the PR4 detector. A switch at the output resamples the
data to get them out in the correct order.
For other PR channels this type of decomposition is not possible, so that their complexity can become
great for real-time processing. In order to suppress some of the states in the corresponding trellis diagram
of those PR systems, thus simplifying the sequence detection process, some data loss has to be introduced.
For instance, in conjunction with precoding (1,7) code prohibits two states in EPR4 trellis: [101] and
[010]. This can be used to reduce the 8-state EPR4 trellis to 6-state trellis depicted in Fig. 34.60 and the
number of add-compare-select units in the VA detector to 4. The data rate loss is 33% in this case. Using
the (2,7) code eliminates two more states, paying the complexity gain by a 50% data rate loss.
Because VA involves addition, multiplication, compare and select functions, which require complex
circuitry at the read side, simplifications of the receiver for certain PRs were sought. One of them is the
dynamic threshold technique [22]. This technique implies generating a series of thresholds. The readback
samples are compared with them, just as for the threshold detector, and are subsequently included in
their modification. While preserving the full function of the ML detector, this technique saves a substantial
fraction of the necessary hardware. Examples of dynamic threshold detectors are given in [30] and [6].
© 2002 by CRC Press LLC
1/0
111
110 0/0
011
100
0/-1
0/-2 1/2
0/-1
1/0
000
-1/0
1/1
1/1
odd
Viterbi I
1 - D
Input even
Viterbi II
1 - D
Output
001
000
001
100
011
110
111
1/1
0/-1
d( y, ( 0,1,1)
) 1.45 ( −0.6 – 1)
2
= + = 4.01
d( y, ( 1,1,0)
) 0.65 ( −0.6 – 0)
2
= + =
1.01 surviving path
0/0
1/0
0/1
1/0
0/-1
1/0
1/2
0/-2