U. Glaeser

Masayuki Miyazaki
Hitachi, Ltd.
15.1 Introduction
© 2002 by CRC Press LLC
15
Low-Power Circuit
Technologies
15.1 Introduction
15.2 Basic Theories of CMOS Circuits
15.3 Supply Voltage Management
Supply Switch • Dynamic Voltage Scaling • Multiple
Supply Voltage
15.4 Threshold Voltage Management
Substrate Bias Control for Leakage Reduction • Substrate
Bias Control for Suppressing Device Fluctuations • Multiple
Threshold Voltage
15.5 Clock Distribution Management
Conditional Clocking • Multiple Frequency Clock
Low-power complementary metal oxide semiconductor (CMOS) circuit design is required to extend the
battery lifetime of portable electronics such as cellular phones or personal digital assistants. Table 15.1
shows a classification of various low-voltage and low-power approaches previously proposed. A system
can be in one of two states. It can be active (or dynamic) performing useful computation, or idle (or
standby) waiting for an external trigger. A processor, for instance, can transit to the idle state once a
required computation is complete. The supply voltage (Vdd), the threshold voltage (Vth) and the clock
frequency (fclk) are parameters that can be dynamically controlled to reduce power dissipation.
In low-voltage systems, the use of reduced threshold devices has caused leakage to become an important
idle state problem. There are several ways to control leakage. One approach is to use a transistor as a supply
switch to cut off leakage during the idle state. Another approach to control leakage involves threshold
voltage adaptation using substrate bias (Vbb) control. The use of multiple thresholds can be easily incorporated
during the synthesis phase. The use of conditional (or gated) clocks is the most common approach
to reduce energy. Unused modules are turned off by suppressing the clock to the module.
Low Vdd operation is very effective for active-power reduction because the power is proportional to
2
Vdd. Adapting the power supply dynamically is widely employed. A less aggressive approach is the use of
multiple static supplies where noncritical path circuits are powered by lower voltages. Dynamic Vth
scaling
by Vbb
control compensates for transistors’ Vth
fluctuations caused by fabrication process variations. As
a result, the technique suppresses the excess leakage power. When the Vth
of transistors is very low, the
suppression of leakage current is useful in the total operating power savings. Conditional clocking also
reduces the dynamic-power consumption since the clock signals are only distributed to operating modules.
The multiple frequency method delivers several frequencies of clock signals in accordance with
required performance in each module. The clock frequency is scheduled depending on data load, and