U. Glaeser

FIGURE 10.41 Max-timing for single-phase, latch-based design under the presence of late clock skew. D 1 transition
is blocked.
FIGURE 10.42 Time borrowing for single-phase, latch-based design under the presence of early clock skew.
Time Borrowing
The preceding max-timing discussion has indicated that the presence of clock skew may result in unintentional
time borrowing. The timing diagram shown Fig. 10.42 illustrates how this could happen. Using
Fig. 10.33 as a reference, the input to the sending latch (D1) is assumed blocked. After propagating through
the max path, the input to the receiving latch ( D′ 1)
must arrive before its setup time to meet the maxtiming
requirement. The early arrival of clock CK′ may be interpreted as if the setup time boundary
moves forward by Tskew, thus reducing the available borrowing time by an equivalent amount.
The condition for maximum time borrowing in this case is formulated as follows:
© 2002 by CRC Press LLC
CK
CK′
D 1
Q 1
D 1 ′
Q 1 ′
CK
CK′
D 1
Q 1
D 1′
Q1′
TCYC Transparent Opaque
T CKQ
T CKQ
T CYC
T MAX
Transparent Opaque
T SKEW
Blocking
TSETUP TSKEW (10.13)
Again assuming that T CKQ ≈ T DQ, in the same manner as Eq. (10.9) was derived, it can be shown that
maximum time borrowing in this case is given by
(10.14)
By comparing Eq. (10.14) against Eq. (10.9) (zero clock skew), it is concluded that the presence of
clock skew reduces the amount of time borrowing by T skew.
T MAX
T ON
Transparent
TCKQ + Tmax < TCYC + TON – Tsetup + Tskew T DQ
( )
Tborrow =
TON – ( Tsetup + Tskew)