U. Glaeser

ei+1,j
~ PL j
~ M j
Aj
~ Aj
FIGURE 9.28(b) Partial product bit generator-2.
The Booth selector is constructed to select either PL j or M j depending on the multiplicand bit (a i or ~a i)
according to the following Boolean equation:
© 2002 by CRC Press LLC
a i+1
~ ai+1 ai ~ a i
TG1
TG2
TG3 TG4
p i,j = (a i PL j + ~a i M j) A j + (a i−1 PL j + ~a i−1 M j) 2A j
(9.61)
In this modified Booth selector implemented with pass transistors, the transistor count per bit is as small
as 10 as illustrated in Fig. 9.28(b). Thus it is reduced roughly to one-half as compared with that of the
regular selector without the speed degradation.
As can be seen from the above explanations, the sign bit, unlike other approaches [39], need not be
treated as a special case of partial product bit, but it is manipulated similarly to other bits. Thus the
correction circuit need not be equipped with for the Booth algorithm.
The Booth algorithm can be generalized to any radix with more than two bits. However, a 3-bit
recoding requires ±3A, which requires addition of ± A and ±2A, resulting in a carry propagation. The
delay with such a mechanism degrades the high-speed capability of a 3-bit recoding. A 4-bit or higher
bit recoding may be considered [40], but it requires very complex recoding circuitry. Eventually, only
the 2-bit (radix 4) recoding is actually used.
Sign Correction for Booth Algorithm
As mentioned in the former section on adders with 2’s complement numbers, the sign bits of the
operands need be extended to the MSB of the sum to correctly calculate these numbers. This sign
extension can be simplified for addition of partial products based on the 2-bit Booth algorithm in the
following way.
Pi+1,j
Pi,j
e i-1,j
P2(i,j)