U. Glaeser

direct properly scaled and logically restored currents to the outputs. The variety of current-mode MVL
circuits reported by various authors over the past decade use various combinations of these three
operations (algebraic sum, compare to thresholds, and switch correct logical current values to the outputs)
to realize all the circuit functions reported.
Most current-mode CMOS MVL circuits have the advantage that they will operate properly at proposed
reduced CMOS power supply voltages. Critics of current-mode CMOS binary and MVL circuits worry
that static current-mode circuits dissipate DC power. Dynamic current-mode CMOS circuits use additional
clocked pairs of transistors and additional clock signals to reduce or eliminate DC power dissipation.
Current-mode CMOS circuits have a fanout of only one, yet, if the loading is known in advance as
is often the case in VLSI design, circuits may be designed very easily with the appropriate number of
individual outputs. Given all the possible advantages and disadvantages of current-mode CMOS circuits,
it is apparent that they warrant continued study. We do not propose that current-mode CMOS MVL
circuits be used, in general, as a replacement for binary voltage-mode CMOS circuits. We do, however,
claim that it may be advantageous in some situations to imbed current-mode CMOS MVL circuits in a
binary design. In the discussions that follow, we review several of the input/output compatible currentmode
CMOS MVL circuits that we have studied over the past decade. These current-mode CMOS circuits,
reviewed in [15], include a simple current threshold comparator [16], MVL encoders and decoders,
quaternary threshold logic full adders (QFAs), current-mode MVL latches, latched current-mode QFA
circuits, and current-mode analog-to-quaternary converter circuits. Each of these circuits is presented
and its performance described. In the next section, the simple current threshold comparator circuit is
described.
CMOS Current Threshold Comparator
A key component in the design of current-mode MVL threshold circuits is the current comparator [16],
or current threshold detector. Performance limitations of the current comparator will determine our
MVL threshold circuits’ ability to discriminate between different input current levels. The current comparator’s
operation is now summarized. The simplest form of the current comparator circuit, shown in
Fig. 11.2, is made up of the diode-connected input NMOS transistor M1,
and NMOS transistor M2
connected to replicate this input current, a reference or threshold current generating pair of transistors
M3
and M4,
and a PMOS transistor M5
that replicates the reference or threshold current. The current in
the input mirror transistor M2
limits at the threshold value as the comparator switches. The drains of
the PMOS replicating transistor M5
and NMOS replicating transistor M2
are connected to generate the
comparator circuit’s output voltage. This comparator circuit is to provide a logical HIGH output voltage
when the input current is less than the threshold current and a logical LOW output voltage when the
input current is greater than the threshold current. (To make a current comparator that gives a logical
HIGH output voltage when the input current is greater than the threshold current and a logical LOW
output voltage when the input current is less than the threshold current we can simply reverse the roles
of the NMOS and PMOS transistors.) Greatest comparator discrimination is obtained by using maximum
comparator gain. This current comparator configuration converts the input current to a voltage, VGS1,
that drives a common-source amplifier with an active load. An equivalent way to describe the operation
of this circuit is to consider it a current mirror that reproduces Iin
as ID,
and ID
then drives a highimpedance
active load to convert the current difference to an output voltage. We can analyze the
comparator to find the transresistance amplifier gain, Ro,
to be the parallel combination of the output
resistances of the NMOS driver and PMOS load devices:
where λ represents the channel length modulation effect and has units of V . A large gain is desired to
provide a sharp comparator transition and greater noise margin. Lower threshold current values will increase
the gain at the expense of greater comparator delay times when driving a constant load. Use of higher
© 2002 by CRC Press LLC
Ro ( ID( λp + λN) ) 1 –
=
−1