U. Glaeser

FIGURE 13.3
Placement and Routing: Distance and Wire Loads Are Performance
Custom and semi-custom design processes generally fix the dimension of one of the two wiring directions.
This fixed dimension is most often in the direction of the width of the datapath. Each bit position in the
datapath has a fixed number of available wiring tracks through the bit slice. The cross direction, or control
direction, dimension varies with the complexity of the cells, the number of counter-datapath or control
signals. In Fig. 13.3 the horizontal direction is fixed and the vertical dimension is variable. Thus, within
a datapath, one dimension is determined by the maximum number of signals, which must travel within
that bit position, and the cross dimension is determined by the sum of the individual cell dimensions,
which are, in turn, determined by either the number of control signals which must pass through the cell
or the size of the transistors and the complexity of the interconnections within the individual cells. From
this simple analysis it is clear that the length of the wires, which drive control singles into the datapath,
is determined by the datapath width, which is a function of the worst datapath-direction wiring needs.
In the most general case, control signals must span all datapath bit positions.
Datapath signals are much more variable in length. Global datapath signals, including data span the entire
dataflow stack. Some macro output datapath signals and forwarding busses may cross a significant portion
of the dataflow stack. Other macro outputs will simply be driven back to the inputs of the macro for
dependent operations or locally to an adjacent latch. In each of these cases, the wire lengths are determined
primarily by the sum of the heights of the cells over which these signals must traverse. Important exceptions
are for wide control buses and for cross wiring dominated structures like shifters and rotators whose height
is determined by the cross, or control-direction, wiring.
Sizing the datapath bit width is performed by analyzing the interconnect needs for global buses and
forwarding buses and local datapath interconnects. Once the maximum number of signals, which must
travel through a bit position, is known and additional datapath wiring resources are allocated for power
and ground signals, this dimension can be fixed.
Wire length analysis in the datapath direction is a more complex iterative process. It involves summing
cross wiring needs for shifters and rotators and wide control buses and the lengths of spanned datapath
circuits. The size of the spanned circuits are often estimated based upon scaling of previous designs
and/or preliminary layout of representative cells. At this point, it is the length of the global and macro
crossing signals which are important. Once the length of these signals is known, estimates of the size of
global buffers and macro output drivers can be made. With repeated application of rather simple sizing
rules, an analysis of the size and topologies of the macro circuits can then be performed. The wire and
estimated sink gates form the load for the macro and global drivers, which determine the size of the
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drivers. Through straightforward rules, such as those presented by Sutherland, et. al., alternatives for
© 2002 by CRC Press LLC
bit 0 bit 1 bit 63
Macro
Datapath
Signals
Global
Datapath
Bus
Custom or semi-custom macro cell placement and wiring.
Control
Signal