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U. Glaeser

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FIGURE 29.6 Histogram of Nonzero DCT coefficients in sample MPEG stream.<br />

Power vs. Quality and Precision Trade-offs<br />

In many DSP applications, lower quality in visual or audio output can be tolerated for reduced power<br />

dissipation. Recently, a number of researchers have resorted to approximate processing as a method for<br />

reducing average system power. Ludwig et al. [31] have demonstrated an approximate filtering technique,<br />

which dynamically reduces the filter order based on the input data characteristics. More specifically, the<br />

number of taps of a frequency-selective FIR filter is dynamically varied based on the estimated stopband<br />

energy of the input signal. The resulting stopband energy of the output signal is always kept under a<br />

predefined threshold. This technique results in power savings of a factor of 6 for speech inputs. Nikol et al.<br />

[32] have demonstrated an adaptive scheme for dynamically reducing the input amplitude of a Boothencoded<br />

multiplier to the lowest acceptable precision level in an adaptive digital equalizer. Their scheme<br />

simply involves an arithmetic shift (multiplication/division by a power of 2) of the multiplier input<br />

depending on the value of the error at the equalizer output. They report power savings of 20%.<br />

When the DA operation is performed MSB first (“Variable Supply Voltage Schemes” subsection), it<br />

exhibits stochastically monotonic successive approximation properties. In other words, each successive<br />

intermediate value is closer to the final value in a stochastic sense. An analytical derivation is presented<br />

in [33]. As an example, let us assume that we have a DA structure computing the dot product of two<br />

vectors. Each vector element is 8-bits 2’s complement integer. If we clock the DA structure of Fig. 29.5<br />

for eight full cycles, the full precision value of the dot product will form into the RESULT register. If<br />

instead we clock the DA structure for four cycles and perform a 4-bit arithmetic left shift of the output<br />

in the RESULT register (multiplication by 2 4 ), we obtain an approximation of the actual dot product. If<br />

we clock the structure once more (total of five cycles) and then perform a 3-bit arithmetic left shift of the<br />

output (multiplication by 2 3 ), we obtain a better approximation. In this way, a DA structure can implement<br />

a fine-grain trade-off between power and precision.<br />

Xanthopoulos [23] is extensively using this property for power reduction in a DCT application. In<br />

image and video compression applications not all spectral coefficients have the same visual significance.<br />

Typically, a large number of high spatial frequencies are quantized to zero in a lossy image/video compression<br />

environment (i.e., JPEG and MPEG) with no significant change in visual quality. The DCT<br />

processor in [23] exploits such different precision requirements on a coefficient basis by reducing the<br />

number of iterations of the DA units that compute the visually insignificant spectral coefficients in a userprogrammable<br />

fashion. Figure 29.7 plots average power chip dissipation vs. compressed image quality in<br />

terms of the image peak SNR (PSNR), a widely used quality measure in image processing. The data points<br />

in the graph have been obtained by chip power measurements at different RAC maximum iteration settings.<br />

The data implies that the chip can produce on average 10 additional decibels of image quality per milliwatt<br />

of power dissipation. Figure 29.8 displays the actual compressed images for three (power, PSNR) data<br />

points of Fig. 29.7 for visual appreciation.<br />

© 2002 by CRC Press LLC<br />

Number of Blocks<br />

50000<br />

40000<br />

30000<br />

20000<br />

10000<br />

0<br />

0 16 32 48 64<br />

Number of Nonzero DCT Coefficients

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