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U. Glaeser

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FIGURE 14.3<br />

today’s design trends are such that the variability in the amount of current drawn from cycle to cycle is<br />

also increasing. These factors combine to make resistive and inductive noise a big problem. Dealing with<br />

this is becoming increasingly costly.<br />

Figure 14.3 gives an idea of the range of dollar amounts associated with the above costs for different<br />

system components in a personal computer. As can be seen, when the CPU power is in the 35–40 W<br />

range, the cost of each additional watt goes above $1 per watt per chip. An interesting observation is that<br />

the power cost of the other system components (DRAM, chipsets, graphics) is on a steeper curve than<br />

the CPU. This is because the spatial layout of today’s system chassis designs is such that these components<br />

are harder to cool. This is likely to change with new designs, further increasing the relative importance<br />

of the CPU power cost. Given the above trends, there is a clear need to analyze and optimize power<br />

consumption for all components of a given system.<br />

This chapter is organized as follows. The need for reducing power consumption in systems is motivated<br />

in greater detail in the section on “The Need for Low Power.” The sources of power consumption are<br />

reviewed in “Sources of Power Consumption,” where a basic power model for complementary metal<br />

oxide semiconductor (CMOS) circuits is presented. “Reducing Power Consumption” provides a overview<br />

of basic power reduction methods. Section 14.2 deals with power estimation, which is a prerequisite for<br />

power aware design. Section 14.3 describes power reduction techniques at various levels of the design<br />

process in greater detail.<br />

The Need for Low Power<br />

The different factors that have led to the increasing importance of the power metric are described in the<br />

following subsections.<br />

Heat Dissipation<br />

The power consumed in an IC is dissipated as heat. Unless this heat is removed, the IC gets hot. The<br />

electrical properties of the devices on the chip are rated for specific temperature ranges, and exceeding<br />

the ranges shifts the parameters and the behavior of circuits. In addition, as an IC gets hot, catastrophic<br />

failure mechanisms become more likely. These include silicon interconnect and junction fatigue, package<br />

failure, thermal runaway, and gate dielectric breakdown. It has been estimated that each 10°<br />

C rise in<br />

operating temperature roughly doubles the component failure rate.<br />

The power consumption in today’s ICs has reached the point that expensive packaging and cooling<br />

mechanisms are needed to keep the operating temperature in check. The peak sustained power consumption<br />

in recent high-performance microprocessors is in excess of 70 W, as shown in Fig 14.1 and Table 14.1.<br />

Packaging and cooling costs are of direct concern even in the domain of lower performance and low<br />

power microprocessors and microcontrollers. The high volume nature of the market for these devices<br />

means that even slight reductions in cost can translate into large revenue increases for the manufacturer.<br />

© 2002 by CRC Press LLC<br />

Total Integration Cost ($)<br />

40<br />

30<br />

20<br />

DRAM<br />

10<br />

Chipset<br />

Graphics<br />

$1/W<br />

0 10 20 30 40<br />

Power (Watts)<br />

Cost of delivering power and cooling in a PC system.<br />

CPU

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