U. Glaeser

FIGURE 44.2
FIGURE 44.3
Core Isolation
Many different approaches (Fig. 44.2) can be used to isolate a core from other cores. One common
approach is to use multiplexers at each I/O of the core. The multiplexors can be controlled by a test
mode so that external vector source can be directly connected to the core I/O during test. This approach
is very advantageous where the core doesn’t have any internal DFT structure and has only functional
vectors which can be applied directly from an external source to the core I/O; however, this approach is
disadvantageous when the number of core I/O exceeds that of the chip I/O and also impacts physical
routing.
In contrast, other approaches minimize the routing density by providing serial access to the core I/O.
The serial access can be through dedicated scan registers at the core I/O or through shared registers,
where sharing can happen between multiple cores. The scan register is called a wrapper or a collar. The
scan registers isolate the core from all other cores and logic during test mode. The wrapper cell is built
with a flip-flop and multiplexor that isolates each pin. It can be seen that the wrapper-based isolation
has impact on the overall area of the core. Sharing existing register cells at core I/O helps minimize the
area impact. Trade-offs exist with respect to core fault coverage and the core interconnect fault coverage,
between shared wrapper and dedicated wrappers.
Access to cores can also be accomplished using the concept of “transparency” through existing logic.
In this case, the user leverages existing functionality of a logic block to gain access to the inputs of the
core and similarly from the core outputs to the chip I/O through another logic block. Figure 44.3 shows
an example of “transparency” in a logic block. Although this approach involves no hardware overhead,
detection of transparency is not a simple automation process. In addition, the existence of transparency
cannot be predicted a priori.
© 2002 by CRC Press LLC
wrapper (Collar)
Scan Register
Transparency
X out := X in
Core isolation techniques.
An example for transparency.
1149.1 Boundary Scan
Direct
core
Demux
A
B
Mux
ALU
X out := X in
Transparency
C = A + B
= A if B = 0