U. Glaeser

majority of the users. Hardware optimizations include selection of CPU, system memory type and size,
VLSI interconnection chips, peripheral storage size, speed and features, and network interface speed and
features. Software tuning mechanisms include optimizing compilers supporting multithreading and
optimized libraries.
Server applications can be characterized in several ways. Some applications require large communication
bandwidth between CPUs, system memory, and storage devices. Other applications require more
execution processing capability by the CPUs. Finally, some servers, such as Web cache, may require highperformance
network interfaces. Hardware and software tuning mechanism satisfies most of these and
other requirements.
Challenges in Server Design
Many challenges exist in the advancement of server designs. Some of the major issues such as physical
and architectural considerations have already been mentioned. Below are several additional challenges
that also need to be addressed:
1. Developing scalable solutions that meet the needs of a variety of users cost effectively is an active
areas of research and development. Scalable architecture elements, such as CPU and system interconnection,
memory, peripheral subsystem, and CPUs, are needed.
2. Development of applications that can benefit more users and take advantage of multiprocessor or
clustered systems is another area of active research and development.
3. Development of additional high performance hardware and software technologies to enable large
number of users sharing the IT infrastructure for new usage models is another active area. New
usage model examples include support for variety of clients such as handheld devices and other
information appliances.
4. Development of scalable and high performance networking technology to interconnect server
components and clusters is also actively being pursued.
5. Research and development of security solutions that do not affect overall system performance,
stop intrusion, and enhance user needs is another area of increasing importance.
Summary
We reviewed many aspects of server infrastructure planning, selection, system design, and development.
Critical requirements such as RAS were described. Server element architecture such as CPU, memory,
and peripherals were discussed. Scalable solutions, software architecture, and applications were discussed,
and avenues of current and future research and development are also described.
5.2 Very Large Instruction Word Architectures
Binu Matthew
What Is a VLIW Processor?
Recent high performance processors have depended on instruction level parallelism (ILP) to achieve high
execution speed. ILP processors achieve their high performance by causing multiple operations to execute
in parallel, using a combination of compiler and hardware techniques. Very long instruction word (VLIW)
is one particular style of processor design that tries to achieve high levels of ILP by executing long
instruction words composed of multiple operations. The long instruction word called a “MultiOp,” consists
of multiple arithmetic, logic, and control operations each of which would probably be an individual
operation on a simple RISC processor. The VLIW processor concurrently executes the set of operations
within a MultiOp, thereby achieving ILP. The remainder of this article discusses the technology, history,
uses, and the future of such processors.
© 2002 by CRC Press LLC