U. Glaeser

TABLE 42.2 Data Accesses, Mac Operations, Instruction Cycles, and Instructions
for an N Tap FIR Filter
DSP
access RAM can be assigned to the data space or to the data/program space, by setting a specific control
bit (the OVLY bit) in a specific control register (the PMST register) [19].
DSP Data Paths
The focus of the previous section was on the overall architecture of a DSP processor and its fundamental
properties to increase the memory bandwidth. This will keep the data paths of the DSP operating every
clock cycle. In this section, some essential properties of the DSP data paths will be described.
Multiply-Accumulate Unit
The unit that is most associated with the DSP is the Mac. It is shown in Fig. 42.58. The most important
properties of the Mac unit are summarized below:
• The multiplier takes two 16-bit inputs and produces a 32-bit multiplier output. Internally the
multiplication might be implemented as a 17 × 17 bit multiplier. This way the multiplier can
implement both two’s complement and unsigned numbers.
© 2002 by CRC Press LLC
Data
Memory
Accesses
MAC
Operations
Instruction
Cycles Instructions
von Neumann 3N N 4N 2N
Harvard 3N N 3N 3N
Modified Harvard with modulo
2N N N 2 (repeat
arithmetic
instruction)
Dual Mac or double frequency Mac 2N N N/2 2 (same)
Dual Mac with 3 data busses 1.5N N N/2 2
Dual Mac with 1 delay registers N N N/2 2
Dual Mac with P delay registers 2N/(P + 1) N N/(P + 1) 2
FIGURE 42.58 Multiply accumulate unit.
16 16
32
Multiplier
32
(Product Register)
16
Add/Subtract
40
40
Accumulator Reg.
Bus
BusA
BusB
40