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K. Wayne Current<br />

University of California<br />

11.1 Introduction<br />

© 2002 by CRC Press LLC<br />

11<br />

Multiple-Valued Logic<br />

Circuits<br />

11.1 Introduction<br />

11.2 Nonvolatile Multiple-Valued Memory Circuits<br />

Multiple-Valued Read Only Memory • Multiple-Valued<br />

EEPROM and Flash Memory<br />

11.3 Current-Mode CMOS Multiple-Valued<br />

Logic Circuits<br />

CMOS Current Threshold Comparator • Current-Mode<br />

CMOS Binary/Quaternary Encoders and Decoders •<br />

Current-Mode CMOS Quaternary Threshold Logic Full<br />

Adder • Current-Mode CMOS Multiple-Valued<br />

Latch • Current-Mode CMOS Latched Quaternary Logic<br />

Full Adder Circuit • Current-Mode CMOS Algorithmic<br />

Analog-to-Quaternary Converter<br />

11.4 Summary and Conclusion<br />

Multiple-valued logic (MVL) is a hybrid of binary logic and analog signal processing: some of the noise<br />

advantages of a single binary signal are retained, and some of the advantages of a single analog signal’s<br />

ability to provide greater informational content are used. Much work has been done on many of the<br />

theoretical aspects of MVL. The theoretical advantages of MVL in reducing the number of interconnections<br />

required to implement logical functions have been well established and widely acknowledged.<br />

Serious pinout problems encountered in some very large scale integrated (VLSI) circuit designs could<br />

be substantially influenced if signals were allowed to assume four or more states rather than only two.<br />

The same argument applies to the interconnect-limited IC design: if each signal line carries twice as<br />

much information, then only half as many lines are required. Four-valued logic signals easily interface<br />

with the binary world; they may be decoded directly into their two-binary-digit equivalent. Many logical<br />

and arithmetic functions have been shown to be more efficiently implemented with MVL, i.e., fewer<br />

operations, gates, transistors, signal lines, etc., are required. Yet, with all the theoretical advantages, MVL<br />

is not in wide use mainly because MVL circuits cannot provide these advantages without cost. The costs<br />

are typically reduced noise margins, slower raw switching speed due to increased circuit complexity and<br />

functionality, and the burden of proving MVL use improves overall system characteristics. As fabrication<br />

technologies evolve, MVL circuit designers adapt to the new technology-related capabilities and limitations<br />

and create new MVL circuit designs. Many MVL circuits have been proposed that use existing and<br />

proposed silicon and III-V fabrication technologies; that signal with flux, charge, current, voltage, and<br />

photons. A discussion of the extensive range of possible circuit-oriented MVL topics would be very

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