U. Glaeser

19. Bell, C. G., Mudge, J. C., and McNamara, J. E., Computer Engineering: A DEC View of Hardware
Systems Design, Digital Press, Bedford, MA, 1978.
20. Salus, P. H., A Quarter Century of UNIX, Addison-Wesley, Reading, MA, 1994.
21. Martin, J., Principles of Data-Base Management, Prentice-Hall, Englewood Cliffs, NJ, 1976.
22. Dougherty, D., Koman, R., and Ferguson, P., The Mosaic Handbook for the X Window System, O’Reilly
& Associates, Sebastopol, CA, 1994.
23. Weste, N. H. E., and Eshraghian, K., Principles of CMOS VLSI Design, Addison-Wesley, Reading,
MA, 1985.
24. Taur, Y. The incredible shrinking transistor, IEEE Spectrum, 36(7), 25, July 1999.
25. Herrell, D., Power to the package, IEEE Spectrum, 36(7), 46, July 1999.
26. Zorain, Y., Testing the monster chip, IEEE Spectrum, 36(7), 54, July 1999.
27. Moore, G. E., Progress in Digital Integrated Electronics, in VLSI Technology Through the 80s and
Beyond, McGreivy, D. J., and Pickar, K. A., Eds., IEEE Computer Society Press, 1982, 41.
28. McGreivy, D. J., VLSI chip trends—size, complexity, cost, in VLSI Technology Through the 80s and
Beyond, McGreivy, D. J., and Pickar, K. A., Eds., IEEE Computer Society Press, 1982, 31.
29. Bayko, J., Great Microprocessors of the Past and Present (V 11.7.0), in Computer Information Centre,
http://bwrc.eecs.Berkeley.edu/CIC/archive/cpu_history.html, February 2000.
30. Mukherjee, A., Introduction to nMOS and CMOS VLSI Systems Design, Prentice-Hall, Englewoods
Cliffs, NJ, 1986.
31. Mead, C., and Conway, L., Introduction to VLSI Systems, Addison-Wesley, Reading, MA, 1980.
32. Burd, T., General Processor Information, in Computer Information Centre, http://bwrc.eecs.
Berkeley.edu/CIC/local/summary.pdf, January 10, 2001.
33. Harned, N., Ultralight lithography, IEEE Spectrum, 36(7), 35, July 1999.
34. ChipGeek, Processor specs, http://www.ugeek.com/procspec/procspec.htm, March 2001.
35. Intel, Processor Hall of Fame, http://www.intel.com/intel/museum/25anniv/hof/hof_main.htm.
36. International Technology Roadmap 2000 Update Overall Roadmap Technology Characteristics,
http://public.itrs.net/Files/2000UpdateFinal/ORTC2000final.pdf, 2000.
37. Yoon, H., et al., A 4Gb DDR SDRAM, ISSCC 2001, 44, 378, 2001.
38. Intel, Intel hits key milestone—yields first silicon from industry’s most advanced 0.13 micron, 300
mm wafer fab, Intel press release, http://www.intel.com/pressroom/archive/releases/20010402corp.htm,
March 28, 2001.
39. Kogge, P. M., The Architecture of Pipelined Computers, Hemisphere Publishing (McGraw-Hill), New
York, 1981.
40. Johnson, Superscalar Microprocessor Design, Prentice-Hall, Englewood Cliffs, NJ, 1991.
41. Satyanarayan, M., Multiprocessors: A Comparative Study, Prentice-Hall, Englewood Cliffs, NJ, 1980.
42. Slater, M., Understanding RISC Microprocessors, Ziff-Davis Press, Emeryville, CA, 1993.
43. Hennessy, J. L., and Patterson, D. A., Computer Architecture A Quantitative Approach, 2nd. ed.,
Morgan Kaufmann, San Francisco, CA, 1996.
44. Offerman, A., Chiplist 9.9.5, http://einstein.et.tudelft.nl/~offerman/chiplist.html, July 1998.
45. Intel, Intel Microprocessor Quick Reference Guide, http://www.intel.com/pressroom/kits/processors/quickreffam.htm,
2001.
46. Nishi, N., et al., A 1 GIPS 1W single-chip tightly-coupled four-way multiprocessor with architecture
support for multiple control flow execution, ISSCC 2000, 43, 418, 2000.
47. TOP500, The top 500 computers, http://www.top500.org, November 2000.
48. Smith, J. E., Characterizing computer performance with a single number, Communications of the
ACM, 31(10), 1202, 1988.
49. Adams, C. W., A chart for EDP experts, Datamation, November/December 1960, 13, 1960.
50. Statland, N., Computer characteristics revisited, Datamation, November 1961, 87, 1961.
51. Knight, K. E., Changes in computer performance, Datamation, September 1966, 40, 1966.
52. Lucas, H. C., Performance evaluation and monitoring, Computing Surveys, 3(3), 79, 1971.
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