U. Glaeser

FIGURE 1.13 Epitaxial channel [9].
FIGURE 1.14 S 4 D MOSFETs [9].
the gate length is small. This is because the gate leakage current decreases in proportion with the gate length
while the drain current increases in inverse proportion with the gate length. As a result, the gate leakage
current can be negligibly small in the normal operation of MOSFETs. The performance of 1.5 nm was
record breaking even at low supply voltage.
In 1993, it was proposed that ultrathin-epitaxial layer shown in Fig. 1.13 is very effective to realize
super retrograde channel impurity profiles for suppressing the short-channel effects. It was confirmed
that 25 nm gate length MOSFETs operate well by using simulation [6]. In 1993 and 1995, epitaxial
channel MOSFETs with buried [7] and surface [8] channels, respectively, were fabricated and high drain
current drive with excellent suppression of the short-channel effects were experimentally confirmed. In
1995, new raised (or elevated) S/D structure was proposed, as shown in Fig. 1.14 [10]. In the structure,
extension portion of the S/D is elevated with self-aligned to the gate electrode by using silicided silicon
sidewall. With minimizing the Si 3N 4 spacer width, the extension S/D resistance was dramatically reduced.
In 1991, NiSi salicide were presented for the first time, as shown in Fig. 1.15 [10]. NiSi has several
advantages over TiSi 2 and CoSi 2 salicides, especially in use for sub-50 nm regime. Because NiSi is a
monosilicide, silicon consumption during the silicidation is small. Silicidation can be accomplished at
low temperature. These features are suitable for ultra-shallow junction formation. For NiSi salicide, there
© 2002 by CRC Press LLC
Epi Channel MOSFETs June 1993
Epitaxial channel
Channel ion implantation
Selective Si epitaxial growth
Epitaxial film
MOSFET fabrication
S4D MOSFETs June 1995
S4D (Silicided Silicon-Sidewall Source and Drain) Structure
Low resistance with ultra-shallow junction
SiN Spacer
GATE
Silicided Si-Sidewall
Si TiSi2 Leff Source Drain