U. Glaeser

FIGURE 2.70 Synthesis of 2-input AND/NAND function: (a) Karnaugh map of AND function, (b) circuit diagram
of AND/NAND function [22].
FIGURE 2.71 Circuit diagram of OR/NOR function [22].
FIGURE 2.72 Karnaugh map and circuit diagram of 3-input AND function [22].
FIGURE 2.73 Circuit diagram of 3-input OR/NOR function [22].
Overlapping cubes C 1 and C 2, Fig. 2.72, saves area, which allows for wider transistors for cube C 3. The
OR/NOR circuit, directly generated from the AND circuit, is shown in Fig. 2.73.
Synthesis of Complex Logic Networks
Synthesis of large pass-transistor networks is a challenging problem. The method presented in the
“Synthesis of Pass-Transistor Networks” section can be extended to synthesize larger functions, as well as
to synthesize complementary CMOS circuits. Complementary CMOS logic is essentially a special case of
© 2002 by CRC Press LLC
B
B
A 0 1
0
A 1
A
0 0
0 1
C 1
(a)
A
V dd
C 2
B
C 3
B
BC
A 00 01
A
0
1
0 0
0 0
C 2
V dd
C
(a)
V dd
A
B
C 3
OR
11 10
0 0
B
A
C 2
C 1
A
AND
B
(b)
B
A
( B*)
A
A
V dd
AND
(b)
B
( A*)
1 0 A B B B
B
A A
A B B B
OR
C
C 1
C 3
B
A A
V dd
NOR
C 2 C 1 C 3 C 3
A A
A B B B
NOR
C
C
NAND