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U. Glaeser

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FIGURE 13.11 Unfooted dynamic 4:1 multiplexor.<br />

FIGURE 13.12 SOI noise simulation.<br />

Because of the reduced junction capacitance of SOI devices, the charge redistribution problem presented<br />

earlier is significantly better in SOI than bulk technologies. Partially-depleted SOI has several other<br />

challenges for the circuit designer: bipolar leakage, the “kink effect” in the I-V characteristic, and the<br />

“history effect.” Each of these effects is related to the body of the SOI device. Although the body can be<br />

terminated through a body contact, 21 the capacitive and delay overhead of the contact generally prevents<br />

them from being used for logic transistors. The voltage on the floating body of the device influences the<br />

on-current through the dynamic raising or lowering of the device threshold and the off-current through<br />

the flow of bipolar current and MOS leakage current due to the variation of the device threshold.<br />

For the SOI 4-to-1 unfooted dynamic multiplexor circuit shown in Fig. 13.11 a noise event waveform<br />

is presented in Fig. 13.12. The waveform shows the voltages and the resulting currents through a leg of<br />

the mux which should be off. At location A in the waveform, the body of device N 1 has drifted to a relatively<br />

high steady-state voltage. At B, the device N 2 is made to conduct. This has the effect of coupling the body<br />

of device N 1 down as the source of N 1 is driven low; however, the body of N 1 is still sufficiently high to<br />

allow current to flow through the parasitic bipolar device. In addition, the voltage on the body of the<br />

device lowers the threshold of the MOS device N 1, making it particularly susceptible to noise at the gate<br />

of N 1. At C, a 300 mV noise pulse on the gate of N 1 results in the dynamic node discharging sufficiently<br />

low to produce an approximately 300 mV output noise pulse.<br />

The failure mechanism is a leakage mechanism, therefore, this failure mode can be minimized through<br />

the introduction and proper sizing of keeper devices. In the previous example, the size of the keeper device<br />

helps determine the amplitude and duration of the noise output pulse. In addition, the predischarge<br />

of the internal nodes in the pull-down network can limit the excursion of the body voltages, thereby<br />

limiting the bipolar leakage current and the reduction in MOS threshold voltage due to the floating body.<br />

Limiting the number of potential leakage paths through pull-down network topology changes can also limit<br />

the floating body induced leakage effects.<br />

Because both the current flow and thus the delay of the gate can be modified by the floating body, the<br />

delay of a circuit becomes time and state dependent. This “history effect” has been shown to lead to variations<br />

in delay of approximately 3–8% depending upon the technology, circuit, and time between activity. 22,23<br />

© 2002 by CRC Press LLC<br />

PC<br />

In_top<br />

PC<br />

2.173<br />

-0.004<br />

2.173<br />

-0.108<br />

2.168<br />

In_bot<br />

Body_top<br />

Id_top<br />

Dyn<br />

Out<br />

-0.013<br />

2.022<br />

0.421<br />

0.006<br />

-0.203<br />

2.235<br />

1.345<br />

0.309<br />

-0.009<br />

N1<br />

N2<br />

A B<br />

C<br />

Out

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