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U. Glaeser

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10 −4 and 10 −2 . The steady-state jitter is examined in the DPLL output phase and the response of the<br />

timing loop to a phase step in the data field. Figure 34.30 shows the transient phase response plots of<br />

the SLT and MM DPLLs responding to a 0.1875T (12T/64) phase step in data field for the same LOW<br />

p g and f g settings. Note that they have very similar responses. Table 34.2 shows the steady-state output<br />

jitter of the two timing loops for various combinations of gains and noise levels corresponding to EERs<br />

of 10 −4 and 10 −2 . The settled DPLL phases show some nonzero jitter without additive noise from quantization<br />

effects. Timing jitter at the DPLL output is measured by measuring the standard deviation of<br />

the DPLL phase. Again, observe that the two timing loops have very similar jitter numbers although the<br />

MM timing loop jitter is slightly lower.<br />

Finally, the Viterbi detector BER performance is examined instead of the timing loop jitter performance<br />

for the read channel architecture of Fig. 34.31 employing the MM and SLT timing loops. Observe that<br />

the BERs of the two systems are practically indistinguishable.<br />

Conclusions<br />

An overview of timing recovery methods for PRML magnetic recording channels, including interpolative<br />

and traditional symbol rate VCO-based timing recovery methods, was provided. Also reviewed<br />

was the MMSE timing recovery from first principles and its formulation in the framework of a SLTbased<br />

timing gradient. A framework for analyzing the performance of the timing loops in terms of<br />

output noise jitter was provided. The jitter calculation is based on obtaining linearized Z domain closed<br />

loop transfer functions of the timing loop. Also compared was the output timing jitter, due to input noise,<br />

© 2002 by CRC Press LLC<br />

TABLE 34.2 Simulation-Based Timing Loop Output Jitter σ jt (Units of T/64)<br />

Performance of SLT and MM Timing Loops for Final EERs of Zero (Noiseless),<br />

10 −4 , and 10 −2<br />

SLT MMPD<br />

pg, fg GAINS EER 0 EER 10 −4<br />

EER 10 −2<br />

EER 0 EER 10 −4<br />

EER 10 −2<br />

LOW 0.49 1.30 2.18 0.45 1.16 1.86<br />

MED 0.49 1.69 2.99 0.46 1.56 2.51<br />

HGH 0.67 2.67 4.86 0.70 2.67 4.38<br />

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FIGURE 34.30 SLT and MM DPLL reaction to 0.1875T (12T/64) phase step. Low p g, f g gains. No noise in this<br />

simulation.

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