Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipPCI-to-PCI Bridge Unit4.4.1 Type 0 CommandsWhen address bits P_AD[1:0] are 00 2 , then the transaction present on the PCI bus is a Type 0configuration read or write command. Type 0 configuration transactions configure PCI devicesconnected to the bus where the transaction originated. The PCI-to-PCI bridge responds to Type 0commands on the Primary PCI interface only. Type 0 configuration commands present on theSecondary bus are ignored by the bridge.The bridge is selected by a PCI configuration command and will claim it (by assertingP_DEVSEL#) when the P_IDSEL pin is asserted, the PCI command indicates a configurationread or write, and address bits P_AD[1:0] are 00 2 all during the address phase. The Primaryinterface will ignore any configuration command (P_IDSEL active) where P_AD[1:0] are not 00 2(see Section 4.4.2 for the case of 01 2 ). During the configuration access address phase, the PCIaddress is divided into a number of fields to determine the actual configuration register access.These fields, in combination with the byte enables during the data phase create the unique encodingnecessary to access the individual registers of the configuration address space:• P_AD[7:2] - Register Number. Selects one of 64 DWORD registers in the bridge PCIconfiguration address space.• P_C/BE[3:0]# - Used during the data phase. Selects which actual configuration register isused within the DWORD address. Creates byte addressability of the register space.• P_AD[10:8] - Function Number. Used to select which function of a multi-function device isbeing accessed. The PCI-to-PCI bridge unit is function 0 and therefore it will only respond to000 2 in this bit field and ignore all other bit combinations. (Refer to Section 5.2.4, “PCIMulti-Function Device Swapping/Disabling” on page 5-24 for exceptions to this statement.)Address bits P_AD[31:11] are used to drive the bridge unit P_IDSEL input. Typically, the IDSELinput of each PCI device on a PCI bus is connected to a unique address bit in this range. Thismapping requires that only one address bit from P_AD[31:11] be asserted during the address phaseof a configuration access.4.4.2 Type 1 Commands and Type 1 to Type 0 ConversionsWhen P_AD[1:0] are 01 2 , a Type 1 configuration command is present. Type 1 commands can beforwarded by the bridge to any level in the PCI hierarchy (up to 255 levels). Eventually, a Type 1command is converted to a Type 0 command by a PCI bridge to configure a device on itsSecondary interface. Configuration registers in the bridge itself (PBNR, SBNR, and SubBNR)identify the bridge Primary bus number, Secondary bus number and a subordinate bus number(highest numbered PCI bus beneath the bridge). These parameters, along with the informationembedded in the PCI Type 1 command determine whether a Type 1 transaction is ignored,forwarded, or converted to a Type 0 command. Type 1 commands are also used as a means forgenerating PCI Special Cycles on a hierarchical bus.Address bits P_AD[10:2] in a Type 1 command have the same function as in a Type 0 command.P_AD[15:11] and P_AD[23:16] are used to determine a unique IDSEL encoding and to determinewhether or not to convert the Type 1 command to a Type 0, forward it unmodified, or ignore itcompletely. The bit fields within a Type 1 PCI configuration command are as follows:• P_AD[7:2] - Register Number. Selects one of 64 DWORD registers in the bridge PCIconfiguration address space.• P_C/BE[3:0]# - Used during the data phase. Selects which actual configuration register isused within the DWORD address. Creates byte addressability of the register space.Developer’s Manual 4-9