Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipPCI-to-PCI Bridge Unit4.5.8 Address Decode SummaryTable 4-5 through Table 4-8 contain a summary of the address decode options. Table 4-5 andTable 4-6 summarize how addresses are decoded for Primary to Secondary transactions. Table 4-5and Table 4-8 summarize how addresses are decoded for Secondary to Primary transactions. Eachpair of tables is divided into one Memory transaction table and one I/O transaction table. The tableslist the various control bits and the potential address ranges.The response for the address is noted in each table entry. The response is determined by the controlbits and by the address range the address falls into. The response may be one of following three:• Forward the transaction across the Bridge (denoted as “Forward”).• Ignore the transaction and do not forward across the Bridge (denoted as “Ignore”).• This particular range is not valid and the response is dictated by another address range(denoted as “Not Valid”).The tables assume that the Memory and I/O Base and Limit address ranges are only valid when theLimit is greater than or equal to the Base. Table 4-5 is a summary of the Memory address decodingrules for Primary to Secondary Memory transactions.Table 4-5.Primary to Secondary Memory Address Decoding SummaryMemoryEnable bitVGAEnable BitSpecialMemoryWindowEnableInMBR/MLRrangeInPMBR/PMLR rangePrimary to SecondaryIn VGAMemoryRangeIn SpecialMemoryRangeOutside allvalidranges0 0 0 Ignore Ignore Not Valid Ignore Ignore0 1 0 Ignore Ignore Not Valid Ignore Ignore1 0 0 Forward Forward Ignore Ignore Ignore1 1 0 Forward Forward Forward Ignore Ignore0 0 1 Ignore Ignore Not Valid Forward Ignore0 1 1 Ignore Ignore Not Valid Forward Ignore1 0 1 Forward Forward Ignore Forward Ignore1 1 1 Forward Forward Forward Forward IgnoreTable 4-6 is a summary of the I/O address decoding rules for Primary to Secondary I/Otransactions. The I/O Enable bit must be set to forward any I/O transactions. To be in the ISArange, the address must also fall in the IOBR/IOLR range. Also, the ISA range covers the completeIOBR/IOLR range.Table 4-6.Primary to Secondary I/O Address Decoding SummaryI/OEnablebitISAModebitVGAEnableBitInIOBR/IOLRrangeInVGA I/ORangePrimary to SecondaryIn ISA range(Lower 256bytes)In ISA range(Upper 768bytes)Outsideall validranges0 X X Ignore Not Valid Ignore1 0 0 Forward Ignore Ignore Not Valid Ignore1 0 1 Forward Forward Ignore Not Valid Ignore1 1 0 Forward Ignore Forward Ignore Ignore1 1 1 Forward Forward Forward Ignore IgnoreNote:When ISA is enabled, not all of the I/O addresses defined by the IOBR/IOLR range are forwardeddownstream.Developer’s Manual 4-25