Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipTest Features14.1.5.11 Capture-IR StateWhen the controller is in the Capture-IR state, the shift register contained in the instruction registerappends the instruction with the fixed value 01 2 on the rising edge of TCK.The test data register selected by the current instruction retains its previous value during this state.The instruction does not change in this state. While in this state, holding TMS high on the risingedge of TCK causes the controller to enter the Exit1-IR state. When TMS is held low on the risingedge of TCK, the controller enters the Shift-IR state.14.1.5.12 Shift-IR StateWhen the controller is in this state, the shift register contained in the instruction register isconnected between TDI and TDO and shifts data one bit position nearer to its serial output on eachrising edge of TCK. The test data register selected by the current instruction retains its previousvalue during this state. The instruction register does not change.When TMS is held high on the rising edge of TCK, the controller enters the Exit1-IR state. WhenTMS is held low on the rising edge of TCK, the controller remains in the Shift-IR state.14.1.5.13 Exit1-IR StateThis is a temporary state. When TMS is held high on the rising edge of TCK, the controller entersthe Update-IR state, which terminates the scanning process. When TMS is held low on the risingedge of TCK, the controller enters the Pause-IR state.The test data register selected by the current instruction retains its previous value during this state.The instruction does not change and the instruction register retains its state.14.1.5.14 Pause-IR StateThe Pause-IR state allows the test controller to temporarily halt the shifting of data through theinstruction register. The test data registers selected by the current instruction retain their previousvalues during this state. The instruction does not change and the instruction register retains its state.The controller remains in this state as long as TMS is held low. When TMS is high on the risingedges of TCK, the controller enters the Exit2-IR state.14.1.5.15 Exit2-IR StateThis is a temporary state. When TMS is held high on the rising edge of TCK, the controller entersthe Update-IR state, which terminates the scanning process. When TMS is held low on the risingedge of TCK, the controller re-enters the Shift-IR state.This test data register selected by the current instruction retains its previous value during this state.The instruction does not change and the instruction register retains its state.14.1.5.16 Update-IR StateThe instruction shifted into the instruction register is latched onto the parallel output from theshift-register path on the falling edge of TCK. Once latched, the new instruction becomes the currentinstruction. Test data registers selected by the current instruction retain their previous values.When TMS is held high on the rising edge of TCK, the controller re-enters the Select-DR-Scan state.When TMS is held low on the rising edge of TCK, the controller re-enters the Run-Test/Idle state.14-22 Developer’s Manual