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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong><strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong> Arbitration7.6.2 Internal Arbitration Control Register - IACRThe Internal Arbitration Control Register (IACR) sets the arbitration priority of each device thatuses the internal bus. This register is part of the local arbitration configuration register space and isaccessible from the <strong>Intel</strong> ® 80200 processor internal bus.Table 7-9.Internal Arbitration Control Register - IACRPCI IOPAttributes Attributes31 28 24 20 16 12 8 4 0rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rw rw rw rw rw rw rw rw rw rw rw rw rw rwna na na na na na na na na na na na na na na rw na na na na na na na na na na na na na na na na<strong>Intel</strong> ® 80200 Processor Local Bus Address1600HAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description31:14 0 Reserved13:12 00 2 Application Accelerator Priority11:10 00 2 CIU Priority9:8 00 2 DMA Channel 2 Priority7:6 00 2 DMA Channel 1 Priority5:4 00 2 DMA Channel 0 Priority3:2 00 2 Secondary ATU Priority1:0 00 2 Primary ATU and Messaging Unit PriorityEach device is given a 2-bit priority shown in Table 7-8. The default values for the IACR give allthe internal bus masters the highest priority.7-14 Developer’s Manual

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