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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>DMA Controller Unit9.5 Data TransfersThe <strong>Intel</strong> ® <strong>80312</strong> I/O companion chip’s DMA controller is optimized to perform data transfersbetween the PCI bus and local memory. These transfers are summarized in the following sections.The DMA Controller does not support Master-Initiated wait states on either interface.9.5.1 PCI-to-Local Memory TransfersPCI-to-Local memory transfers perform read cycles on the PCI bus and place the data into theDMA channel queues. Once data is placed into the queue, the internal bus interface of the DMAchannel requests the internal bus and drain the queue by writing the data to the local memory.The application software can use the various PCI command types to improve system performancefor these transfers. The three defined PCI read commands include: Memory Read, Memory ReadLine, and Memory Read Multiple. Refer to the PCI Local Bus Specification, Revision 2.2 for fulldescription of these PCI commands.For example, a Memory Read Multiple command can be programmed when the block size is largerthan a cache line. This is used to notify the PCI target that the DMA channel intends to transfer alarge block of data and the target should try to read ahead and anticipate the DMA controller readrequests.The application software determines which command type best meets the needs of the system.9.5.2 Local Memory to PCI Transfers: Memory Write CommandLocal memory to PCI transfers perform read cycles on the internal bus and place the data into theDMA channel queues. Once data is placed into the queue, the PCI bus interface of the DMAchannel requests the PCI bus and drain the queue by writing the data to the PCI bus. Memory Writecommands can be used for all data transfers to the PCI bus.Local memory to PCI transfers generate two PCI write command types: Memory Write andMemory Write and Invalidate. The application software can use the appropriate PCI commandtype. However, the PCI target may provide better system performance by using the Memory Writeand Invalidate command.Developer’s Manual 9-15

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