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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>Application Accelerator Unit10.7 Programming the Application AcceleratorThe software for initiating an XOR-transfer using the Application Accelerator falls into thefollowing categories:• AAU initialization• Start XOR transfer• Suspend AAUAn example for each category is shown in the following sections as pseudo code flow.10.7.1 Application Accelerator InitializationThe AAU is designed to have independent control of the interrupts, enables, and control. Theinitialization consists of virtually no overhead as shown in Figure 10-13.Figure 10-13. Pseudo Code: Application Accelerator InitializationACR = 0x0000 0000 ; Disable the application acceleratorCall setup_accelerator10.7.2 Start XOR TransferThe AAU control register provides independent control each time the AAU is configured. Thisprovides the greatest flexibility to the applications programmer. The example shown inFigure 10-14 describes the pseudo code for initiating an XOR operation with the AAU.Figure 10-14. Pseudo Code: XOR Transfer Operation; Set up descriptor in <strong>Intel</strong>® 80200 processor local memory at address dd.nda = 0 /* No chaining */d.SAR1 = 0xA000 0400/* Source address of Data Block 1 */d.SAR2 = 0xA000 0800/* Source address of Data Block 2 */d.SAR3 = 0xA000 0C00/* Source address of Data Block 3 */d.SAR4 = 0xA000 1000/* Source address of Data Block 4 */d.DAR = 0xB000 0100/* Destination address of XOR-ed data */d.ABCR = 1024 /* Byte Count of 1024 */d.ADCR = 0x8000 049F/* Direct fill data from Block 1 *//* XOR with data from Block 2,Block 3 andBlock 4 *//* Store the result & interrupt processor */; Check for Inactive AAU & no pending interruptsif (ASR != 0) exit /* If AAU is not ready, exit */; Start OperationANDAR = &dACR = 0x00000001; Set up descriptor address; Set AAU Enable bitDeveloper’s Manual 10-19

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